ICS950602 Datasheet, PDF (1/16 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for PII/III

Integrated
Circuit
Systems, Inc.
ICS950602
Programmable Timing Control Hub™ for PII/III™
Recommended Application:
VIA Mobile PL133T and PLE133T Chipsets.
Output Features:
• 2 - CPU clocks @ 2.5V
• 1 - Pairs of differential CPU clocks @ 3.3V
• 7 - PCI including 1 free running @ 3.3V
• 7 - SDRAM @ 3.3V
• 1 - 48MHz @ 3.3V fixed
• 1 - 24_48MHz selectable @ 3.3V
• 2 - REF @ 3.3V, 14.318MHz
Features/Benefits:
• Programmable output frequency.
• Programmable output divider ratios.
• Programmable output rise/fall time.
• Programmable output skew.
• Programmable spread percentage for EMI control.
• Watchdog timer technology to reset system
if system malfunctions.
• Programmable watch dog safe frequency.
• Support I²C Index read/write and block read/write
operations.
• Uses external 14.318MHz crystal.
Key Specifications:
• CPU Output Jitter <200ps
• CPU Output Skew <175ps
• PCI to PCI Output Skew <500ps
Block Diagram
Pin Configuration
GND 1
*FS2/REF1 2
REF0 3
Vtt_PWRGD# 4
VDDREF 5
GND 6
X1 7
X2 8
VDDPCI 9
*FS4/PCICLK_F 10
*FS3/PCICLK0 11
GND 12
PCICLK1 13
PCICLK2 14
PCICLK3 15
PCICLK4 16
PCICLK5 17
SDRAM_IN 18
*CPU_STOP# 19
*PCI_STOP# 20
*PD# 21
**MULTISEL 22
GND 23
SDATA 24
48 CPUCLK0
47 CPUCLK1
46 VDDCPU_2.5
45 VDDCPU_3.3
44 CPUCLKT
43 CPUCLKC
42 GND
41 RESET#
40 I REF
39 SDRAM6
38 GND
37 SDRAM0
36 SDRAM1
35 VDDSDRAM
34 SDRAM2
33 SDRAM3
32 GND
31 SDRAM4
30 SDRAM5
29 VDDSDRAM
28 AVDD48
27 48MHz/FS0*
26 24_48MHz/FS1*
25 SCLK
48-Pin SSOP & TSSOP
* Internal Pull-up resistor of 120K to VDD
** these inputs have 120K internal pull-down
to GND
Host Swing Select Functions
MULTISEL0
0
Board Target
Trace/Term Z
50 ohms
1
50 ohms
Reference R,
Iref = V_DD/(3*Rr)
Rr = 221 1%,
Iref = 5.00mA
Rr = 475 1%,
Iref = 2.32mA
Output
Current
Voh @ Z
Ioh = 4* I REF 1.0V @ 50
Ioh = 6* I REF 0.7V @ 50
0469B—12/18/02