ICS95V842 Datasheet, PDF (3/9 Pages) Integrated Circuit Systems – DDR Phase Lock Loop Clock Driver (60MHz - 220MHz)

ICS95V842
Absolute Maximum Ratings
Supply Voltage: (VDD & AVDD) . . . . . . . . . . . . . . . . -0.5V to 3.6V
Input clamp current: I_IK (VI < 0 or VI > VDD) . . . . . . +/- 50mA
Output clamp current: I_OK (VO < 0 or VO > VDD) . . +/- 50mA
Continuous output current: I_O (VO = 0 to VDD) . . . . +/- 50mA
Package thermal impedance, theta JA: DGG package +89°C/Ω
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
Input High Current
I_IH V_I = V_DD or GND
5
Input Low Current
I_IL
V_I = V_DD or GND
Operating Supply
I_DD2.5 C_L = 0pF, R_L = ∞Ω
Current
I_DDPD C_L = 0pF, R_L = ∞Ω
Output High Current
I_OH V_DD = 2.3V, V_OUT = 1V
-18
Output Low Current
I_OL V_DD = 2.3V, V_OUT = 1.2V
26
High Impedance
Output Current
I_OZ V_DD=2.7V, Vout=V_DD or GND
Input Clamp Voltage
V_IK Iin = -18mA
High-level output voltage
V_DD = min to max,
V_OH
I_OH = -1 mA
V_DD = 2.3V,
I_OH = -12 mA
V_DD - 0.1
1.7
V_DD = min to max
Low-level output voltage
V_OL
I_OL=1 mA
V_DD = 2.3V
I_OH=12 mA
Input Capacitance¹
C_IN VI = V_DD or GND
3
Output Capacitance¹
C_{OUT VI = VDD or GND}
3
1_{Guaranteed by design and characterization, not 100% tested in production.}
MAX
5
160
100
±10
-1.2
0.1
0.6
UNITS
µA
µA
mA
µA
mA
mA
µA
V
V
V
V
pF
pF
0830A—09/10/04
3