ICS87946-01 Datasheet, PDF (3/13 Pages) Integrated Circuit Systems – LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS87946-01
LOW SKEW ÷1, ÷2
LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V_DDx
Inputs, V_I
Outputs, V_O
Package Thermal Impedance, θ_JA
Storage Temperature, T
STG
4.6V
-0.5V to V_DD + 0.5V
-0.5V to V_DDx + 0.5V
47.9°C/W (0 lfpm)
-65°C to 150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in
the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, V_DD = V_DDX = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions Minimum
V_DD
Positive Supply Voltage
*V_DDx
Output Supply Voltage
I_DD
Core Supply Current
**I_DDx
Output Supply Current
*V_DDx denotes V_DDA, V_DDB, V_DDC.
**I_DDx denotes I_DDA, I_DDB, I_DDC.
3.135
3.135
Typical
3.3
3.3
41
8
Maximum
3.465
3.465
Units
V
V
mA
mA
TABLE 4B. LVCMOS DC CHARACTERISTICS, V_DD = V_DDX = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical
V_IH
Input High Voltage
2
V
Input Low Voltage
-0.3
IL
I_IH
Input
DIV_SELA, DIV_SELB,
High Current DIV_SELC, MR/nOE
V_DD = V_IN = 3.465V
I_IL
Input
Low Current
DIV_SELA, DIV_SELB,
DIV_SELC, MR/nOE
V_DD = 3.465V, V_IN = 0V
-5
V_OH
Output High Voltage; NOTE 1
2.6
V_OL
Output Low Voltage; NOTE 1
I_OZL
Output Tristate Current Low
I
Output Tristate Current High
OZH
NOTE 1: Outputs terminated with 50Ω to V_DDx/2. See page 7, Figure 1A, 3.3V Output Load Test Circuit.
Maximum
V_DD + 0.3
0.8
150
0.5
TBD
TBD
Units
V
V
µA
µA
V
V
V
V
TABLE 4C. LVPECL DC CHARACTERISTICS, V_DD = V_DDX = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
PCLK
I
Input High Current
IH
nPCLK
V_DD = V_IN = 3.465V
V_DD = V_IN = 3.465V
PCLK
I_IL
Input Low Current
nPCLK
V_DD = 3.465V, V_IN = 0V
V = 3.465V, V = 0V
DD
IN
-5
-150
V_PP
Peak-to-Peak Input Voltage
0.3
V_CMR
Common Mode Input Voltage; NOTE 1, 2
GND + 1.5
NOTE 1: Common mode voltage is defined as V_IH.
NOTE 2: For single ended applications, the maximum input voltage for PCLK and nPCLK is V_DD + 0.3V.
87946AY-01
www.icst.com/products/hiperclocks.html
3
150
µA
5
µA
µA
µA
1
V
V_DD
V
REV. A JANUARY 2, 2002