ICS8761 Datasheet, PDF (3/15 Pages) Integrated Circuit Systems – LOW VOLTAGE, LOW SKEW, PCI / PCI-X CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
ICS8761
LOW VOLTAGE, LOW SKEW,
PCI / PCI-X CLOCK GENERATOR
Number
Name
Type
Description
46
47
49, 51,
53, 55
50, 54
57, 59,
61, 63
V_DDOFB
FB_OUT
QD3, QD2,
QD1, QD0
V_DDOD
QC3, QC2,
QC1, QC0
Power
Output
Output
Power
Output
Output supply pin for FB_Out output.
Feedback output. Connect to FB_IN. 15Ω typical output impedance.
LVCMOS / LVTTL interface levels.
Bank D clock outputs. 15Ω typical output impedance.
LVCMOS / LVTTL interface levels.
Output supply pins for Bank D outputs.
Bank C clock outputs. 15Ω typical output impedance.
LVCMOS / LVTTL interface levels.
58, 62
V_DDOC
Power
Output supply pins for Bank C outputs.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
Test Conditions
C_IN
Input Capacitance
R_PULLUP Input Pullup Resistor
R_PULLDOWN Input Pulldown Resistor
C_PD
Power Dissipation Capacitance ^V_DD^{, V}_DDA ^{= 3.465V; V}_DDOx ^{= 3.465V}
(per output); NOTE 1
V_DD, V_DDA = 3.465V; V_DDOx = 2.625V
R_OUT
Output Impedance
NOTE 1: V_DDOx denotes V_DDOA, V_DDOB, V_DDOC, V_DDOD, V_DDOFB.
Minimum
Typical
15
Maximum
4
51
51
9
11
Units
pF
KΩ
KΩ
pF
pF
Ω
TABLE 3A. OUTPUT CONTROL PIN FUNCTION TABLE
Inputs
MR
OEA
OEB
OEC
OED
1
1
1
1
1
0
1
1
1
1
X
0
0
0
0
QA0:QA3
LOW
Active
HiZ
Outputs
QB0:QB3
QC0:QC3
LOW
LOW
Active
Active
HiZ
HiZ
QD0:QD3
LOW
Active
HiZ
TABLE 3B. OPERATING MODE FUNCTION TABLE
Inputs
PLL_SEL
0
1
Operating Mode
Bypass
PLL
TABLE 3C. PLL INPUT FUNCTION TABLE
XTAL_SEL
0
1
Inputs
PLL Input
REF_CLK
XTAL Oscillator
8761CY
www.icst.com/products/hiperclocks.html
3
REV. C SEPTEMBER 7, 2004