ICS85454-01 Datasheet, PDF (2/15 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-LVDS MULTIPLEXER

Integrated
Circuit
Systems, Inc.
ICS85454-01
DUAL 2:1/1:2
DIFFERENTIAL-TO-LVDS MULTIPLEXER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
QA0, nQA0 Output
Differential output pair. LVDS interface levels.
3, 4
QA1, nQA1 Output
Differential output pair. LVDS interface levels.
5
INB
Input Pulldown Non-inverting differential clock input.
6
nINB
Input
Pullup/
Pulldown
Inverting differential clock input. V_DD/2 default when left floating.
Select pin for QAx outputs. When HIGH, selects same inputs used for
7
SELB
Input Pulldown QB output. When LOW, selects INB input.
LVCMOS/LVTTL interface levels.
8
GND
Power
Power supply ground.
9
nINA1
Input
Pullup/
Pulldown
Inverting differential clock input. V_DD/2 default when left floating.
10
INA1
Input Pulldown Non-inverting differential clock input.
11
nINA0
Input
Pullup/
Pulldown
Inverting differential clock input. V_DD/2 default when left floating.
12
INA0
Input Pulldown Non-inverting differential clock input.
13
14
15, 16
V_DD
SELA
nQB, QB
Power
Input
Output
Pulldown
Positive supply pin.
Select pin for QB outputs. When HIGH, selects INA1 input.
When LOW, selects INA0 input. LVCMOS/LVTTL interface levels.
Differential output pair. LVDS interface levels.
NOTE: Pulldown and Pullup refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
R_PULLDOWN
R_PULLUP
Parameter
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
37.5
37.5
Maximum
Units
kΩ
kΩ
TABLE 3. INPUT CONTROL FUNCTION TABLE
Control Inputs
SELA
SELB
0
0
1
0
0
1
1
1
Mode
LOOP0 selected
LOOP1 selected
Loopback mode: LOOP0
Loopback mode: LOOP1
85454AK-01
www.icst.com/products/hiperclocks.html
2
REV. B JUNE 16, 2006