ICS85454-01 Datasheet, PDF (1/15 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-LVDS MULTIPLEXER

Integrated
Circuit
Systems, Inc.
ICS85454-01
DUAL 2:1/1:2
DIFFERENTIAL-TO-LVDS MULTIPLEXER
GENERAL DESCRIPTION
The ICS85454-01 is a 2:1/1:2 Multiplexer and
ICS
a member of the HiPerClockS^TM family of high
HiPerClockS™ _{performance clock solutions from ICS. The 2:1}
Multiplexer allows one of 2 inputs to be select-
ed onto one output pin and the 1:2 MUX
switches one input to both of two outputs. This device
may be useful for multiplexing multi-rate Ethernet PHYs
which have 100Mbit and 1000Mbit transmit/receive
pairs onto an optical SFP module which has a single
transmit/receive pair. Another mode allows loop back
testing and allows the output of a PHY transmit pair to be
routed to the PHY input pair. For examples, please refer to
the Application Information section of the data sheet.
The ICS85454-01 is optimized for applications requiring
very high performance and has a maximum operating
frequency in 2.5GHz. The device is packaged in a small,
3mm x 3mm VFQFN package, making it ideal for use on
space-constrained boards.
FEATURES
• Dual 2:1/1:2 MUX
• Three LVDS outputs
• Three differential inputs
• Differential inputs can accept the following differential
levels: LVPECL, LVDS, CML
• Loopback test mode available
• Maximum output frequency: 2.5GHz
• Part-to-part skew: 250ps (maximum)
• Additive phase jitter, RMS: 0.05ps (typical)
• Propagation delay: 550ps (maximum)
• 2.5V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages
BLOCK DIAGRAM
SELB
INB
nINB
QB
nQB
0
0
1
1
PIN ASSIGNMENT
INA0
nINA0
LOOP0
QA0
nQA0
16 15 14 13
QA0 1
12 INA0
nQA0 2
11 nINA0
QA1 3
10 INA1
nQA1 4
9 nINA1
5678
INA1
nINA1
LOOP1
QA1
nQA1
ICS85454-01
16-Lead VFQFN
3mm x 3mm x 0.95 package body
K Package
Top View
85454AK-01
SELA
www.icst.com/products/hiperclocks.html
1
REV. B JUNE 16, 2006