ICS85454-01 Datasheet, PDF (11/15 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-LVDS MULTIPLEXER

Integrated
Circuit
Systems, Inc.
ICS85454-01
DUAL 2:1/1:2
DIFFERENTIAL-TO-LVDS MULTIPLEXER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85454-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85454-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V_DD = 2.5V + 5% = 2.625V, which gives worst case results.
· Power__MAX = V_{DD_MAX} * I_{DD_MAX} = 2.625V * 90mA = 236.3mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of
the device. The maximum recommended junction temperature for HiPerClockS^TM devices is 125°C.
The equation for Tj is as follows: Tj = θ_JA * Pd_total + T_A
Tj = Junction Temperature
θ_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T_A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ_JA must be used. Assuming
no air flow of and a multi-layer board, the appropriate value is 51.5°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.236W * 51.5°C/W = 97.2°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air
flow, and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θ_JA FOR 16-PIN VFQFN, FORCED CONVECTION
θ_JA vs. 0 Air Flow (Linear Feet per Minute)
Multi-Layer PCB, JEDEC Standard Test Boards
0
51.5°C/W
85454AK-01
www.icst.com/products/hiperclocks.html
11
REV. B JUNE 16, 2006