ICS8431-11 Datasheet, PDF (2/13 Pages) Integrated Circuit Systems – 255MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
ICS8431-11
255MHZ, LOW JITTER,
LVPECL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
Name
1-5
M0-M6
6-8
10, 11
12
13
14
15
M7-M8
SSC CTL0,
SSC CTL1
VEE
TEST I/O
VDD
VEE
16, 17 nFOUT, FOUT
18
19, 23, 24
20
21
22
25, 26
27
28
VDDO
nc
MR
VEE
VDDA
XTAL1, XTAL2
VDDI
nP_LOAD
Type
Description
Input
Pulldown
M divider inputs. Data latched on LOW-to-HIGH transistion of
nP_LOAD input. LVCMOS / LVTTL pins interface levels.
Input
Pullup
M divider inputs. Data latched on LOW-to-HIGH transistion of
nP_LOAD input. LVCMOS / LVTTL pins interface levels.
Input Pullup SCC control pins. LVTTL / LVCMOS interface levels.
Power
Input /
Output
Power
Power
Output
Power
Unused
Input
Power
Power
Input
Power
Input
Ground pin for core and test output.
Programmed as input in PLL bypass mode.
Power supply pin for core and test output.
Ground pin for output.
These differential outputs are main output drivers for the synthesizer.
They are compatible with terminated positive referenced LVPECL
logic.
Power supply pin for output.
No connection.
Pulldown Reset M counter. Forces FOUT low.
Ground pin.
PLL power supply pin.
Crystal oscillator input.
Power supply pin for core.
Pulldown M divider latch enable input. LVTTL / LVCMOS interface levels.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input Pin Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
51
51
Maximum
4
Units
pF
KΩ
KΩ
ICS8431CM-11
www.icst.com/products/hiperclocks.html
2
REV. A JULY 11, 2001