ICS8735-01 Datasheet, PDF (15/17 Pages) Integrated Circuit Systems – 1:5 DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - K SUFFIX FOR 32 LEAD VFQFN
ICS8735-01
1:5 DIFFERENTIAL-TO-3.3V LVPECL
ZERO DELAY CLOCK GENERATOR
8735AY-01
TABLE 9B. PACKAGE DIMENSIONS
JEDEC VARIATION
ALL DIMENSIONS IN MILLIMETERS
SYMBOL
MINIMUM
MAXIMUM
N
32
A
0.80
1.0
A1
0
0.05
A3
0.25 Reference
b
0.18
0.30
e
0.50 BASIC
N_D
8
N
8
E
D
5.0
D2
1.25
3.25
E
5.0
E2
1.25
3.25
L
0.30
0.50
Reference Document: JEDEC Publication 95, MO-220
www.icst.com/products/hiperclocks.html
15
REV. F NOVEMBER 12, 2004