ICS950810 Datasheet, PDF (14/19 Pages) Integrated Circuit Systems – Frequency Generator with 200MHz Differential CPU Clocks

ICS950810
3V66 & PCI Phase Relationship
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there
is no defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66 by the
standard skew described below as Tpci.
3V66 (1:0)
3V66 (4:2)
3V66_5
Tpci
PCICLK_F (2:0) PCICLK (6:0)
Skews at Common Transition Edges
GROUP
SYMBOL
CONDITIONS
PCI
PCI t_sk1
V_T = 1.5 V
3V66
3V66 t_sk1
V_T = 1.5 V
3V66 to PCI
S_3V66-PCI
3V66 (5:0) leads 33MHz PCI
1_{Guarenteed by design, not 100% tested in production.}
MIN TYP MAX UNITS
127 500
ps
67 250
ps
1.5
3.5
ns
0472F—01/12/04
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