ICS950810 Datasheet, PDF (11/19 Pages) Integrated Circuit Systems – Frequency Generator with 200MHz Differential CPU Clocks

ICS950810
I2C Tables
BYTE
Affected Pin
0 Pin #
Name
Bit 7
-
Spread Enabled
Bit 6
-
CPU_T(2:0)
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
35 3V66_1/VCH_CLK
53
CPU_STOP#*
34
PCI_STOP#*
40
FS2
55
FS1
54
FS0
Control Function
Spread Spectrum Control
Power down mode output
level
0= CPU driven in power
down
1= undriven
VCH/66.66 Select
Reflects value of pin
Reflects value of pin at
power up. Also can be set.
Frequency Selection
Frequency Selection
Frequency Selection
Type
RW
RW
RW
R
R/RW
RW
RW
RW
Bit Control
0
1
OFF ON
HIGH LOW
66.66 48.00
Stop Active
Stop Active
-
-
-
-
-
-
PWD
0
0
0
X
1
X
X
X
BYTE
1
Bit 7
Affected Pin
Pin #
Name
43
MULTSEL0*
Bit 6
-
CPU_T(2:0)
Bit 5 45, 44
Bit 4 49, 48
Bit 3 52, 51
Bit 2 45, 44
Bit 1 49, 48
Bit 0 52, 51
CPUCLKT2
CPUCLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
CPUCLKT2
CPUCLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT2
CPUCLKC2
Control Function
Reflects value of pin
Type
R
Bit Control
0
1
-
-
PWD
x
CPU_Stop mode output level
0= CPU driven when stopped RW HIGH LOW 0
1 = undriven
Allow control of output with
assertion of CPU_STOP#.
RW ^Not Freerun
Freerun
0
Allow control of output with _RW Not _{Freerun 0}
assertion of CPU_STOP#.
Freerun
Allow control of output with _RW Not _{Freerun 0}
assertion of CPU_STOP#.
Freerun
Output control
RW Disable Enable 1
Output control
RW Disable Enable 1
Output control
RW Disable Enable 1
0472F—01/12/04
11