ICS954204 Datasheet, PDF (11/16 Pages) Integrated Circuit Systems – Programmable Timing Control HubTM for Mobile P4TM Systems

Integrated
Circuit
Systems, Inc.
ICS954204
SMBus Table: Output Enable Control Register
Byte 0
Pin #
Name
Bit 7
35, 36
CPUCLK2_ITP/SRCCLK7
Enable
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-
30, 31
26, 27
24, 25
22, 23
19, 20
17, 18
SRCCLK5 Enable
SRCCLK4/SATA Enable
SRCCLK3 Enable
SRCCLK2 Enable
SRCCLK1 Enable
SRCCLK0 Enable
Control Function
Output Enable
Reserved
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
SMBus Table: PLL1 Spread and Output Enable Control Register
Byte 1
Pin #
Name
Control Function
Bit 7
8
PCI_F0 Enable
Output Enable
Bit 6
14,15
DOT_96MHz Enable
Output Enable
Bit 5
12
USB_48MHz Enable
Output Enable
Bit 4
52
REFOUT Enable
Output Enable
Bit 3
-
Reserved
Bit 2
41, 40
CPU_1 Enable
Output Enable
Bit 1
44, 43
CPU_0 Enable
Output Enable
Bit 0
-
Spread Spectrum Mode
Spread Control for PLL1
(CPU, SRC, PCIF, PCI)
Type
RW
RW
RW
RW
RW
RW
RW
0
Disable (HiZ)
1
Enable
Disable (HiZ)
Disable (HiZ)
Disable (HiZ)
Disable (HiZ)
Disable (HiZ)
Disable (HiZ)
Enable
Enable
Enable
Enable
Enable
Enable
Type
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable (HiZ)
Disable
Disable
1
Enable
Enable
Enable
Enable
Disable (HiZ)
Disable (HiZ)
Enable
Enable
SPREAD OFF SPREAD ON
SMBus Table: Output Enable Control Register
Byte 2
Pin #
Name
Bit 7
5
PCICLK5
Bit 6
4
PCICLK4
Bit 5
3
PCICLK3
Bit 4
56
PCICLK2
Bit 3
Bit 2
Bit 1
Bit 0
9
PCI_F1 Enable
Control Function
Output Enable
Output Enable
Output Enable
Output Enable
Reserved
Reserved
Reserved
Output Enable
SMBus Table: SRC Free-Running Control Register
Byte 3
Pin #
Name
Bit 7
35, 36
SRCCLK7
Bit 6
-
Bit 5
30, 31
SRCCLK5
Bit 4
26, 27
SRCCLK4/SATA
Bit 3
24, 25
SRCCLK3
Bit 2
22, 23
SRCCLK2
Bit 1
19, 20
SRCCLK1
Bit 0
17, 18
SRCCLK0
Control Function
Free-Running Control
Reserved
Free-Running Control, not
affected by PCI/SRC_STOP#
Type
RW
RW
RW
RW
RW
Type
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
1
Enable
Enable
Enable
Enable
Disable
Enable
0
Free-Running
1
Stoppable
Free-Running
Free-Running
Free-Running
Free-Running
Free-Running
Free-Running
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
PWD
1
1
1
1
1
1
1
1
PWD
1
1
1
1
-
1
1
0
PWD
1
1
1
1
1
1
1
1
PWD
0
0
0
0
0
0
0
0
0933D—03/16/05
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