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| ICS94203 Datasheet, PDF (11/18 Pages) Integrated Circuit Systems – Programmable System Frequency Generator for PII/III™ | |||
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ICS94203
Absolute Maximum Ratings
Core Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 4.6 V
I/O Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND â0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . â65°C to +150°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections
of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.
Group Timing Relationship Table1
Group
CPU to SDRAM
CPU to 3V66
SDRAM to 3V66
CPU 66MHz
SDRAM 100MHz
Offset Tolerance
2.5ns 500ps
7.5ns 500ps
0.0ns 500ps
CPU 100MHz
SDRAM 100MHz
Offset Tolerance
5.0ns 500ps
5.0ns 500ps
0.0ns 500ps
CPU 133MHz
SDRAM 100MHz
Offset Tolerance
0.0ns 500ps
0.0ns 500ps
0.0ns 500ps
CPU 133MHz
SDRAM 133MHz
Offset Tolerance
3.75ns 500ps
0.0ns 500ps
3.75ns 500ps
3V66 to PCI
PCI to PCI
USB & DOT
1.5-3.5ns
0.0ns
Asynch
500ps
1.0ns
N/A
1.5-3.5ns
0.0ns
Asynch
500ps
1.0ns
N/A
1.5-3.5ns
0.0ns
Asynch
500ps
1.0ns
N/A
1.5 -3.5ns
0.0ns
Asynch
500ps
1.0ns
N/A
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70º C; Supply Volt age VDD = 3.3 V +/-5% (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Input High Voltage
VIH
2
VDD+0.3 V
Input Low Voltage
VIL
VSS-0.3
0.8
V
Input High Current
IIH
VIN = VDD
5
A
Input Low Current
IIL1 VIN=0 V;Inputs with no pull-up resistors -5
uA
Input Low Current
IIL2
VIN=0 V; Inputs with pull-up resistors -200
uA
Supply Current IDD3.3OP100
CL=30 pF
346 400 mA
Power Down
PD
4.3 600 mA
Input frequency
Fi
VDD = 3.3 V;
CIN
Logic Inputs
Input Capacitance1
CIN
Logic Inputs
Clk Stabilization1
CINX
TSTAB
X1 & X2 pins
From VDD= 3.3 V to 1% target Freq.
1 Guaranteed by design, not 100% tested in production.
12 14.318 16
5
5
27
45
3
MHz
pF
pF
pF
ms
11
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