IC41LV44002A Datasheet, PDF (7/20 Pages) Integrated Circuit Solution Inc – 4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

IC41C44002A/IC41C44002AS(L)
IC41LV44002A/IC41LV44002AS(L)
AC CHARACTERISTICS^{(1,2,3,4,5,6)}
(Recommended Operating Conditions unless otherwise noted.)
Symbol
tRC
tRAC
tCAC
tAA
tRAS
tRP
tCAS
tCP
tCSH
tRCD
tASR
tRAH
tASC
tCAH
tRAD
tRAL
tRSH
tRHCP
tCLZ
tCRP
tOD
tOE
tOED
tOEHC
tOEP
tRCS
tRRH
tRCH
tWCH
tWP
tWPZ
tRWL
tCWL
tWCS
Parameter
Random READ or WRITE Cycle Time
Access Time from RAS^{(6, 7)}
Access Time from CAS^{(6, 8, 15)}
Access Time from Column-Address⁽⁶⁾
RAS Pulse Width
RAS Precharge Time
CAS Pulse Width⁽²³⁾
CAS Precharge Time⁽⁹⁾
CAS Hold Time ⁽²¹⁾
RAS to CAS Delay Time^{(10, 20)}
Row-Address Setup Time
Row-Address Hold Time
Column-Address Setup Time⁽²⁰⁾
Column-Address Hold Time⁽²⁰⁾
RAS to Column-Address Delay Time⁽¹¹⁾
Column-Address to RAS Lead Time
RAS Hold Time
RAS Hold Time from CAS Precharge
CAS to Output in Low-Z^{(15, 24)}
CAS to RAS Precharge Time⁽²¹⁾
Output Disable Time^{(19, 24)}
Output Enable Time^{(15, 16)}
Output Enable Data Delay (Write)
OE HIGH Hold Time from CAS HIGH
OE HIGH Pulse Width
Read Command Setup Time^{(17, 20)}
Read Command Hold Time
(referenced to RAS)⁽¹²⁾
Read Command Hold Time
(referenced to CAS)^{(12, 17, 21)}
Write Command Hold Time⁽¹⁷⁾
Write Command Pulse Width⁽¹⁷⁾
WE Pulse Widths to Disable Outputs
Write Command to RAS Lead Time⁽¹⁷⁾
Write Command to CAS Lead Time^{(17, 21)}
Write Command Setup Time^{(14, 17, 20)}
-50
Min. Max.
84
−
−
50
−
14
−
25
50 10K
30
−
8 10K
10
−
38
−
12 37
0
−
8
−
0
−
8
−
10 25
25
−
8
−
30
−
0
−
5
−
0
15
−
12
20
−
5
−
10
−
0
−
0
−
0
−
8
−
8
−
10
−
13
−
8
−
0
−
-60
Min. Max.
104 −
−
60
−
15
−
30
60 10K
40
−
10 10K
10
−
40
−
14 45
0
−
10
−
0
−
10
−
12 30
30
−
10
−
35
−
0
−
5
−
0
15
−
15
20
−
5
−
10
−
0
−
0
−
0
−
10
−
10
−
10
−
15
−
10
−
0
−
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Integrated Circuit Solution Inc.
7
DR026-0A 09/04/2001