IC61SF12832 Datasheet, PDF (6/17 Pages) Integrated Circuit Solution Inc – 128K x 32 Flow Through SyncBurst SRAM

IC61SF12832
IC61SF12836
TRUTH TABLE
Operation
Deselected, Power-down
Deselected, Power-down
Deselected, Power-down
Deselected, Power-down
Deselected, Power-down
Read Cycle, Begin Burst
Read Cycle, Begin Burst
Write Cycle, Begin Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Write Cycle, Continue Burst
Write Cycle, Continue Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Write Cycle, Suspend Burst
Write Cycle, Suspend Burst
Address
Used
None
None
None
None
None
External
External
External
Next
Next
Next
Next
Next
Next
Current
Current
Current
Current
Current
Current
CE CE2 CE2 ADSP ADSC ADV WRITE OE DQ
H
X
X
X
L
X
X
X High-Z
L
X
H
L
X
X
X
X High-Z
L
L
X
L
X
X
X
X High-Z
X
X
H
H
L
X
X
X High-Z
X
L
X
H
L
X
X
X High-Z
L
H
L
L
X
X
X
X High-Z
L
H
L
H
L
X Read X High-Z
L
H
L
H
L
X Write X High-Z
XX
X
H
H
L Read L
Q
XX
X
H
H
L Read H High-Z
HX
X
X
H
L Read L
Q
HX
X
X
H
L Read H High-Z
XX
X
H
H
L Write X High-Z
HX
X
X
H
L Write X High-Z
XX
X
H
H
H Read L
Q
XX
X
H
H
H Read H High-Z
HX
X
X
H
H Read L
Q
HX
X
X
H
H Read H High-Z
XX
X
H
H
H Write X High-Z
HX
X
X
H
H Write X High-Z
PARTIAL TRUTH TABLE
Function
GW BWE
Read
Read
Write Byte 1
Write All Bytes
Write All Bytes
H
H
H
L
H
L
H
L
L
X
BW1
X
H
L
L
X
BW2
X
H
H
L
X
BW3 BW4
XX
HH
HH
LL
XX
6
Integrated Circuit Solution Inc.
SSR018-0A 09/17/2001