IC61SF12832 Datasheet, PDF (3/17 Pages) Integrated Circuit Solution Inc – 128K x 32 Flow Through SyncBurst SRAM

IC61SF12832
IC61SF12836
BLOCK DIAGRAM
CLK
ADV
ADSC
ADSP
17
A16-A0
GW
BWE
BW4
BW3
BW2
BW1
CE
CE2
CE2
MODE
CLK
Q0 _A0
A0’
BINARY
COUNTER
CE
Q1 _A1
A1’
CLR
128K x 32, 128K x 36
MEMORY ARRAY
D
Q
ADDRESS
REGISTER
CE
CLK
D _DQd Q
BYTE WRITE
REGISTERS
CLK
D _DQc Q
BYTE WRITE
REGISTERS
CLK
D _DQb Q
BYTE WRITE
REGISTERS
CLK
D _DQa Q
BYTE WRITE
REGISTERS
CLK
D
Q
ENABLE
REGISTER
CE
CLK
15
17
32
32
or
or
36
36
4
INPUT
REGISTERS
CLK
32 or 36
OE
DQ[31:0] or
DQ[35:0]
D
Q
ENABLE
DELAY
REGISTER
CLK
OE
Integrated Circuit Solution Inc.
3
SSR018-0A 09/17/2001