IC-MHL200 Datasheet, PDF (9/33 Pages) IC-Haus GmbH – 12-BIT LINEAR / ROTARY POSITION HALL ENCODER

iC-MHL200
12-BIT LINEAR / ROTARY POSITION HALL ENCODER
Rev C1, Page 9/33
ELECTRICAL CHARACTERISTICS
Operating conditions:
VPA, VPD = 5 V ±10 %, Tj = -40...125 °C, IBM adjusted to 200 µA , unless otherwise noted
Item Symbol Parameter
No.
Conditions
Clock Generation
501 f()sys
System Clock
bias current adjusted
502 f()sdc
Sine-to-Digital Converter Clock bias current adjusted
Sine-to-Digital Converter
602 AAabs Absolute Angular Accuracy
Vpp() = 4 V, adjusted
603 AArel
Relative Angular Accuracy
with reference to one output period at A, B, at
Resolution 1 024, see Figure 21
604 f()ab
Output Frequency at A, B
CFGMTD = 0
CFGMTD = 1
605 REScom Resolution of Commutation Con-
verter
606 AAabs
Absolute Angular Accuracy of
Commutation Converter
BiSS Interface, Digital Output SLO, Digital Inputs MA, SLI
701 Vs(SLO)hi Saturation Voltage hi
V(SLO) = V(VPD) − V(),
I(SLO) = 4 mA
702 Vs(SLO)lo Saturation Voltage lo
I(SLO) = 4 mA to VND
703 Isc(SLO)hi Short-Circuit Current hi
V(SLO) = V(VND), 25 °C
704 Isc(SLO)lo Short-Circuit Current lo
V(SLO) = V(VPD), 25 °C
705 tr(SLO) Rise Time SLO
CL = 50 pF
706 tf(SLO) Fall Time SLO
CL = 50 pF
707 Vt()hi
Threshold Voltage hi: MA, SLI
708 Vt()lo
Threshold Voltage lo: MA, SLI
709 Vt()hys Threshold Hysteresis: MA, SLI
710 Ipd(SLI) Pull-up Current: MA, SLI
V() = 0...VPD − 1 V
711 Ipu(MA) Pull-Up Current 30 µA MA
712 f()MA
Permissible Frequency at MA
Zapping ROM and Test VZAP, PTE
801 Vt()hi
Threshold Voltage hi VZAP, PTE with reference to VND
802 Vt()lo
Threshold Voltage lo VZAP, PTE with reference to VND
803 Vt()hys Hysteresis
Vt()hys = Vt()hi − Vt()lo
804 Vt()nozap Threshold Voltage Nozap VZAP V() = V(VZAP) − V(VPD), V(VPD) = 5 V ±5 %,
at chip temperature 27 °C
805 Vt()zap
Threshold Voltage Zap VZAP
V() = V(VZAP) − V(VPD), V(VPD) = 5 V ±5 %,
at chip temperature 27 °C
806 V()zap Zapping Voltage
PROG = 1
807 V()zpd Diode voltage, Zapped
for iC-Haus chip test only
808 V()uzpd Diode Voltage, Unzapped
for iC-Haus chip test only
809 Rpd()VZAP Pull-down Resistor at VZAP
V() = 0 V...V(VPD)
Error Monitor NERR
901 Vt()hi
Input Threshold Voltage hi
with reference to VND
902 Vs()lo
Saturation Voltage lo
I() = 4 mA , with reference to VND
903 Vt()lo
Input Threshold Voltage lo
with reference to VND
904 Vt()hys Input Hysteresis
Vt()hys = Vt()hi − Vt()lo
905 Ipu(NERR) Pull-up Current
V(NERR) = 0...VPD − 1 V
906 Isc()lo
Short-Circuit Current NERR
V(NERR) = V(VPD), 25 °C
907 tf(NERR) Decay Time NERR
CL = 50 pF
Min. Typ. Max.
0.85 1.0 1.2
14
16
18
-0.35
0.35
-15 ±10 15
0.5
2.0
1.875
-0.5
0.5
0.4
0.4
-90 -50
50
80
60
60
2
0.8
150 250
6
30
60
-60 -30
-6
10
2
0.8
100 250
0.8
1.2
6.9 7.0 7.1
2
3
30
55
2
0.4
0.8
150 250
-750 -300 -80
50
80
60
Unit
MHz
MHz
Deg
%
MHz
MHz
Deg
Deg
V
V
mA
mA
ns
ns
V
V
mV
µA
µA
MHz
V
V
mV
V
V
V
V
V
kΩ
V
V
V
mV
µA
mA
ns