English
Language : 

IC-MHL200 Datasheet, PDF (23/33 Pages) IC-Haus GmbH – 12-BIT LINEAR / ROTARY POSITION HALL ENCODER
iC-MHL200
12-BIT LINEAR / ROTARY POSITION HALL ENCODER
Rev C1, Page 23/33
At the reversal point at +10 °, first the corresponding
edge is generated at A. As soon as an angle of 1.4 °
has been exceeded in the other direction in accordance
with the hysteresis, the return edge is generated at A
again first. This means that all edges are shifted by the
same value in the rotating direction.
will increase when movement of the magnetic tape is
performed as shown in Figure 6. To obtain increasing
angular position values in the CW (clockwise) direction,
CFGDIR then has to be set to 1.
CFGZPOS(7:0) Addr. 0x07; bit 7:0
Value
Function
0x0
0°
0x1
1.4 °
0x2
2.8 °
...
360
256
·CFGZPOS
0xff
358.6 °
Table 18: Programming AB zero position
The internal analog sine and cosine signal which are
available in test mode are not affected by the setting of
CFGDIR. They will always appear as shown in Figure
6.
CFGSU
Value
0x0
0x1
Addr. 0x08; bit 3
Function
ABZ output "111" during startup
AB instantly counting to actual position
The position of the index pulse Z can be set in 1.4 °
steps. An 8-bit register is provided for this purpose,
which can shift the Z-pulse once over 360 °.
Table 21: Configuration of output startup
CFGMTD
CFGMTD2
CFGMTD2
0
0
1
1
Addr. 0x08; bit 4
Addr. 0x0A; bit 0
CFGMTD
Minimum edge spacing
0
500 ns
max. 500 kHz at A
1
125 ns
max. 2 MHz at A
0
8 µs
max. 31.25 kHz at A
1
2 µs
max. 125 kHz at A
Table 19: Minimum edge spacing
Depending on the application, a counter cannot bear
generated pulses while the module is being switched
on. When the supply voltage is being connected, first
the current position is determined. During this phase,
the quadrature outputs are constantly set to "111" in the
setting CFGSU = 0. In the setting CFGSU = 1, edges
are generated at the output until the absolute position
is reached. This enables a detection of the absolute
position with the incremental interface.
The CFGMTD register defines the time in which two
consecutive position events can be output. The default
is a maximum output frequency of 500 kHz on A. This
means that at the highest resolution, high magnetic
input frequencies beyond 500 Hz (equivalent to 2 m/s
comparable to Item 102) can be correctly shown. In the
setting with an edge spacing of 125 ns, the edges can
be generated even at the highest revolution and the
maximum speed. However, the counter connected to
the module must be able to correctly process all edges
in this case. The settings with 2 µs, and 8 µs can be
used for slower counters. It should be noted then, how-
ever, that at higher resolutions the maximum rotation
speed is reduced.
CFGDIR
Value
0x0
0x1
Addr. 0x08; bit 5
Function
Rotating direction CCW
Rotating direction CW
Commutation signals
The converter for the generation of the commutation
signals can be configured for two and four-pole motors.
Three rectangular signals each with a phase shift of
120 ° are generated. With two-pole commutation, the
sequence repeats once per rotation. With a four-pole
setting, the commutation sequence is generated twice
per rotation.
CFGPOLE
Value
0x0
0x1
Note
Addr. 0x8; bit 2
Function
2 pole commutation (1 pole pair per mag. period)
4 pole commutation (2 pole pairs per mag. period)
Magnetic period = 4 mm.
Table 22: Commutation
Table 20: Rotating direction reversal
The rotating direction can easily be changed with the
bit CFGDIR. When the setting is CCW (counter-clock-
wise, CFGDIR = 0) the resulting angular position values
The zero position of the commutation, i.e. the rising
edge of the track U, can be set as desired over a rota-
tion. Here 192 possible positions are available. Values
above 0xC0 are the mirrored positions from 0x70.