IC-MHL200 Datasheet, PDF (29/33 Pages) IC-Haus GmbH – 12-BIT LINEAR / ROTARY POSITION HALL ENCODER

iC-MHL200
12-BIT LINEAR / ROTARY POSITION HALL ENCODER
OTP PROGRAMMING ³
Rev C1, Page 29/33
Once the RAM parameters have been configured these figuration. (In case of differences, a new programming
settings can be written to the underlying zapping ROM. run is needed.)
ENHC
0
1
Addr. 0x0f; bit 7
Default setting
ZAP diode testing: Use a higher current for reading
the ZAP diodes memory (0x10-0x1f)
Table 34: Enable High Current
As a requirement for programming, a zapping voltage
(nominal 7 V, see item 806 in the electrical characteris-
tics for tolerances) has to be provided via pin VZAP and
VNA. Also, the device is not in the test mode, e.g. the
test register has to be set to TEST = 0x00. Temporary,
CIBM has to be set to 0x0.
Then the internal programming algorithm for the ZAP
diodes is started by setting the bit PROGZAP. When
programming routine terminates, the PROGZAP bit re-
sets automatically. Successful programming is then
indicated by the status register (address 0x77) when bit
PROGOK is set and PROGERR is unset - otherwise,
an error situation has occurred (like missing zapping
voltage).
The second verification step requires setting CIBM to
its maximum value of 0xF and changing VPD, VPA to a
low supply voltage of 4.0 V, again followed by a read out
of the ROM. If both kind of readouts at these extreme
settings are showing no deviations from the expected
values, the the verification process has completed.
START
SET CONFIGURATION
SSSEEETTTECCNIIBBHMMC ^===000xxx000
SET ALREADY PROG. BITS = 0
PROGOK
Addr. 0x77; bit 0
PROGERR
Addr. 0x77; bit 7
PROGOK PROGERR Corrective actions
0
0
Set VZAP to 7 V
0
1
Set VZAP to 7 V and TEST = 0x00
1
0
Zapping was successful
1
1
Undefined state
Table 35: Zapping results
START HW ZAP ALGORITHM
SET ADR 0x0F = 0x01
VPD = VPA = 5.0V
FALSE
VERIFY
ENHC = 0x0
CIBM = 0x0
TRUE
The ZAP memory can be tested by reading the regis-
ter range 0x10-0x1f. This test can be done with with
a higher readout current (bit ENHC = 1) to simulate
deteriorated working conditions.
The following sequence has to be performed according
to Figure 29 to verify zapping ROM content:
FALSE
VERIFY
ENHC = 0x1
CIBM = 0xF
TRUE
STOP
Figure 29: Programming algorithm
CIBM is first set to 0x0 at address 0x04 and the hard-
ware programming algorithm started by bit PROGZAP.
After programming, as a first verification step, set CIBM
back to 0x0 and change VPD, VPA to a high supply
voltage of 5.5 V. Then read-out the ROM value which
should not differ from the intended programmed con-
When a register bit has to be programmed once again
after verifying failed, already programmed register bits
need not be programmed and the corresponding RAM
register bits have to be set to 0.
3 _{Regarding chip release 2, please refer to the design review on page 31.}