IC-TW8_16 Datasheet, PDF (7/67 Pages) IC-Haus GmbH – 16-BIT SIN/COS INTERPOLATOR

iC-TW8 16-BIT SIN/COS INTERPOLATOR
WITH AUTO-CALIBRATION
Rev C2, Page 7/67
PIN FUNCTIONS
No. Name
27 SCL
28 SDA
29 WP
I/O
Digital in/out,
10 kΩ pull-up
Digital in/out,
10 kΩ pull-up
Digital out
30 C0
31 C1
32 C2
33 C3
34 XOUT
Analog in
Analog in/out
35 XIN
36 nc
37 nc
38 AVDD
39 SIN+
40 SIN-
41 COS+
42 COS-
43 nc
44 VC
45 VREF
46 AVSS
47 ZERO+
48 ZERO-
Analog in
Supply
Analog in
Analog in
Analog in
Analog in
Analog out
Analog out
Ground
Analog in
Analog in
Function
EEPROM Clock Line
EEPROM Data Line
EEPROM Write Protection
Description
This pin connects to the EEPROM SCL pin. No external I2C pull-up
resistor is required as 10 kΩ is integrated.
This pin connects to the EEPROM SDA pin. No external I2C pull-up
resistor is required as 10 kΩ is integrated.
This pin acts as the write protect signal and connects to the EEPROM
WP pin. No external pull-up is required as this pin is a push-pull output
actively driving low and high.
Configuration
Inputs
If the pin configuration mode is used (pin PINSEL tied high), each pin
functions as 12-level configuration input.
If serial configuration mode is used (pin PINSEL tied low), connect
these pins to DVSS on PCB.
Crystal Terminal
Crystal Terminal
Pin should be tied to AVSS if no crystal is used.
An external oscillator or other square wave clock source can be used
to drive this pin. Refer to Providing a Clock.
Pin must be tied to AVSS if no crystal is used.
These pins have no connection to die. Connect to DVSS on PCB.
Analog Power Supply
Sine Input +
Sine Input -
Cosine Input +
Cosine Input -
Bias Output
Bias Output
Analog Ground
Zero Input +
Zero Input -
+3.1 V to +5.5 V supply voltage terminal. Keep it clean!
DVDD and AVDD must be the same voltage level (5 V or 3.3 V).
Differential sine signal input. For single ended sensors SIN- must be
biased to an appropriate DC level.
Differential cosine signal input. For single ended sensors COS- must
be biased to an appropriate DC level.
Pin has no connection to die. Connect to DVSS on PCB.
Decouple with 1 µF capacitor to AVSS. Do not inject noise into this pins
as it directly impacts ADC conversion noise.
Decouple with 1 µF capacitor to AVSS. Do not inject noise into this pin
as it directly impacts ADC conversion noise.
Pin must be tied to high quality ground, usually a solid PCB plane.
Differential Zero Gating Input.
If single ended signal sources are used, the unused terminal (either
ZERO+ or ZERO-) must be tied to an appropriate DC bias.