IC-TW8_16 Datasheet, PDF (6/67 Pages) IC-Haus GmbH – 16-BIT SIN/COS INTERPOLATOR

iC-TW8 16-BIT SIN/COS INTERPOLATOR
WITH AUTO-CALIBRATION
Rev C2, Page 6/67
PIN FUNCTIONS
No. Name
1 nc
2 xRST
I/O
Digital in,
low active,
40 kΩ pull-up
Function
Reset Input
3 FAB
4 EESEL
5 CALIB
6 CLOCK
Digital in,
Test Enable Input
5 kΩ pull-down
Digital in,
Selection Input
150 kΩ pull-down
Digital in,
10 kΩ pull-up,
hysteresis
Calibration Control
Digital in/out,
Clock Output
150 kΩ pull-down
7 IR
8 FRAME
Digital in/out,
150 kΩ pull-up
1-Wire Interface I/O
Digital in/out,
Sync Output
150 kΩ pull-down
9 SPI_SO
10 SPI_SI
Digital out
Digital in
SPI Slave Output
SPI Slave Input
11 SPI_SCLK Digital in,
SPI Slave Clock Input
with hysteresis
12 nc
13 nc
14 SPI_xSS
Digital in,
low active
SPI Slave Select Input
15 DVSS
16 OUTZ
17 OUTB
Ground
Digital out
Digital out
18 OUTA
Digital out
19 STATUS Digital out
Digital Ground
Z Output
B Output
PWM- Output
Z Window
A Output
PWM+ Output
Z Window
PWM Status Output
20 FAULT
Digital out
Error Status Output
21 DVDD
22 PINSEL
23 nc
24 nc
25 nc
26 reserved
Supply
Digital Power Supply
Digital in,
Configuration Mode
150 kΩ pull-down Selection
Description
Pin has no connection to die. Connect to DVSS on PCB.
The device is held in reset as long as xRST is low.
For operation at 5 V, connect 68 kΩ to DVSS (changes the pow-
er-on-reset threshold to approx. 4 V). Refer to section Power-on-Reset
and Startup for more information on reset.
Fabrication test is enabled when pin is high during reset. This pin must
be connected to DVSS for normal operation.
Pin must be tied low.
Device enters calibration mode on falling edge of CALIB. Adaptation
parameters are written to the external eeprom on rising edge of CALIB.
This pin should be left floating or connected to DVDD if not used.
The pin is a programmable clock output that can be used for PWM
synchronization.
A connection to DVSS is advisable when not in use.
Pin is bi-directional. Refer to Programmer’s Reference for more details.
This pin outputs the internal ADC sampling clock, which can be used to
synchronize downstream circuits.
A connection to DVSS is advisable when not in use.
Pin directly connects to an SPI master MI pin.
Pin directly connects to SPI master MO pin.
This pin should be tied to DVSS if the SPI is not used.
Pin connects to SPI master clock output. The input implements hys-
teresis to avoid double triggering.
This pin must be tied to DVSS if the SPI is not used.
These pins have no connection to die. Connect to DVSS on PCB.
In 4-pin SPI mode this pin directly connects to the SPI master slave
select output. In case the SPI is operated in 3-pin mode, SPI_xSS
must be tied low to DVSS.
This pin is not debounced or filtered. A noise-free ground connection is
essential to avoid SPI_SO tri-stating during communication.
If the SPI is not used, this pin should be tight to DVDD or DVSS.
Pin must tie to high quality ground, usually a solid PCB plane.
Quadrature interface reference output.
In quadrature mode this is output B.
In PWM mode this is PWM-, the inverted output of OUTA.
In Z calibration mode (bit RB_TEST1.z_test = 1) this is the Z window
seen just after the input comparator.
In quadrature mode this is output A.
In PWM mode this is PWM+.
In Z calibration mode (bit RB_TEST1.z_test = 1) this is the Z window
used to gate the Z output.
This pin provides proportional status information. Pin can drive a
10 mA LED and is widely configurable. Refer to section Monitoring
Interpolation Quality for details.
Pin is low on error and is capable of driving a 10 mA LED. The error
response can be configured as detailed in section Fault Handling for
details.
+3.1 V to +5.5 V supply voltage terminal.
DVDD and AVDD must be the same voltage level (5 V or 3.3 V).
Tie pin to DVSS to enable serial configuration mode.
Tie pin to DVDD to select pin configuration mode.
These pins have no connection to die. Connect to DVSS on PCB.
Connect this pin to DVSS on PCB.