IC-MQ_15 Datasheet, PDF (37/43 Pages) IC-Haus GmbH – Sin/Cos INTERPOLATION IC WITH RS422 DRIVER

iC-MQ PROGRAMMABLE 9-BIT
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
Offset Ref.
self-tracking
VOS12 = 0x03 source VDC
VDC1 = 0x20
VDC2 = 0x20
center setting
Calibration 2
Offset Ref.
VOS12
Offset Range
OR1, OR2
multiplier
(keep low for accuracy)
System Test
Rev F3, Page 37/43
Pin PZ:
yes
VDC1
AC ripple ?
up / down
minimized
Pin NZ:
yes
VDC2
AC ripple ?
up / down
minimized
#3: ref. calib. (only for VDC)
Pin PA:
no
duty cycle
OF1
up / down
50 % ?
(>50%) (<50%)
yes
Pin PB:
duty cycle
50 % ?
yes
no
OF2
up / down
(>50%) (<50%)
#4: offset calibration
Figure 19: With self-tracking source VDC as offset ref-
erence, an adjustment of the center poten-
tials VDC1 and VDC2 for minimal AC ripple
is advisable. Other offset references do not
requires this adjustment.
Figure 20: Selection of offset ranges OR1 and OR2
and the subsequent calibration of OF1 and
OF2. Selecting OR1 resp. OR2 as small
as possible permits a finer adjustment.
Figure 21: Test signal at pin PA for offset calibration
of channel CH1. The adjustment is ideal at
a duty ratio of 50%.
Figure 22: Test signal at pin PB for offset calibration
of channel CH2. The adjustment is ideal at
a duty ratio of 50%.
System Test
Pin NA:
no
duty cycle
50 % ?
yes
PH12
up / down
(>90°) (<90°)
#5: phase calibration
Figure 23: Correction of the sine-to-cosine phase shift
by PH12. Repeating the gain and offset
calibrations may be reasonable if larger
phase correction values are required (refer
to chapter signal conditioning for further
details).
Figure 24: Test signal at pin NA for phase calibration
of channel CH1 versus CH2. The adjust-
ment is ideal at a duty ratio of 50%.