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IC-HF Datasheet, PDF (31/36 Pages) IC-Haus GmbH – 6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER
iC-HF
preliminary
6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER
iC-NQC
Rev C1, Page 31/36
iC-NQC is a 13-bit sin/cosine-to-digital converter with
calibration and can also be driven by iC-HF, as shown
in figure 34. iC-HF provides reverse polarity protection
to the sensor side interface through pins VDDS and
GNDS.
In the example, iC-NQC is a BiSS slave node. iC-HF is
configured in A/B/Z and BiSS/SSI mode through pins
FMSEL2 and FMSEL1. BiSS signals SLO, MA and
SLI are carried through iC-HF channels 4, 5 and 6,
respectively.
In Encoder Link State the TMA mode of iC-NQC can
be activated to bypass analog sine/cosine signals on A,
B, SDA and SCL signals.
In a default mode, channels 1, 2 and 3 from iC-HF are
operated as RS-422 line drivers, outputting A, B and
Z signals from iC-NQC. An EEPROM is used in the
example and it is accessed via I2C bus. I2C signals are
also connected to iC-HF input pins NX1 and NX2. If
iC-HF enters Encoder Link State, signals at X1 to X3
and NX1 to NX3 will be directly linked to output pins Q1
to Q3 and NQ1 to NQ3. Therefore, in this configuration
the I2C bus will be available at pins NQ1 and NQ2.
Error signal from iC-NQC is connected to NERRI of
iC-HF. This allows combining an error event from
iC-NQC with an error event of iC-HF that is signaled at
NERR output of iC-HF.
VDDA
VDD
INCREMENTAL
OUTPUT
BISS
INTERFACE
E2PROM
INTERFACE
A
A
B
B
Z
Z
MA MA
SLO SLO
SLI SLI
SDA
SDA
SCL
SCL
iC-NQC
NERR
VDDS
1 μF
GNDS
VDD
4.5..5.5V
REVERSE POLARITY PROTECTION GND
1 μF
X1
BYP
NX1
X2
NX2
X3
NX3
X4
RS422
Q1
TRI
NQ1
Q2
RS422
NQ2
Q3
RS422
NQ3
RS422 Output
Q4
TRI
NQ4
A
B
Z
SLO
X5
X6
PTC
ECM
OEN
FMSEL1
FMSEL2
NERRI
+
_
TRI
RS422 Input
Q5
NQ5
+
_
TRI
RS422 Input
Q6
NQ6
BYP EBIS TRI
CONTROL
LOGIC
OVT
BYPR
ENCODER LINK
REQUEST
DETECTION
OVT
PoDo
OVERTEMP
POWER DOWN
Q1
NQ1
NERR
PoDo
1
iC-HF
MA
SLI
NERR
GNDA
CONTROL LOGIC
GND
EEPROM
SDA
SCL
Figure 34: Example application of iC-NQC with iC-HF