IC-HF Datasheet, PDF (29/36 Pages) IC-Haus GmbH – 6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER

iC-HF
preliminary
6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER
Rev C1, Page 29/36
As shown in figure 32 iC-MU can also be operated as a
BiSS slave. Master clock MA is input through, channel
5, data input SLI though channel 6, and data output
SLO is sent through channel 4.
iC-MU is initially in ABZ function, and signals are output
in RS-422 protocol by pins Q1, NQ1, Q2, NQ2, and Q3,
NQ3. In ABZ function, PB3 provides the error signal
from iC-MU. In the example, this signal is connected to
NERRI from iC-HF and transferred through NERR.
PB3 is also connected to NX3 from iC-HF. If iC-MU
changes to analog function and iC-HF enters Encoder
Link State, analog signals at PB0 to PB3 will be linked
inside iC-HF and output through pins Q1, Q2, Q3, and
NQ3.
VPA
VPD
iC-MU
ANA/DIG OUTPUT
1 μF
PB0
A
PB1
B
PB2
Z
PB3
NER
SER INTERFACE
SCL
SDA
I2C INTERFACE
EEPROM
PA0
PA1 MA
PA2 SLI
PA3 SLO
VNA
VND
VDDS
GNDS
REVERSE POLARITY PROTECTION
VDD
GND
RS422 output
Q1
X1
TRI
NQ1
NX1
X2
Q2
NX2
RS422 output
NQ2
X3
Q3
NX3
RS422 output
NQ3
Q4
X4
RS422 output
NQ4
RS422 Input
Q5
X5
+
_
NQ5
TRI
RS422 Input
Q6
X6
+
_
NQ6
TRI
BYP EBIS TRI
PTC
ECM
OEN
FMSEL1
FMSEL2
NERRI
CONTROL
LOGIC
OVT
PoDo
1
BYPR
ENCODER LINK
REQUEST
DETECTION
OVT
PoDo
OVERTEMP
POWER DOWN
Q1
NQ1
NERR
iC-HF
4.5..5.5V
1 μF
A
B
Z
SLO
MA
SLI
NERR
Figure 32: Example application with iC-MU and iC-HF in A/B/Z and BiSS/SSI mode