IC-HF Datasheet, PDF (14/36 Pages) IC-Haus GmbH – 6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER

iC-HF
preliminary
6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER
Rev C1, Page 14/36
not detect a BiSS bus structure damage nor activate
automatically the BiSS bus loopback.
When the iC-HF is configured as a termination node
of the BiSS bus, some channels configurations are
changed with respect to BiSS bus loopback mode.
Channel 1 is disabled and pins Q1/NQ1 will be in high
impedance. The clock input signal MA entering chan-
nel 4 is no longer transmitted along the bus through
channel 1.
Output signals from channel 2 will also be disabled,
setting Q2/NQ2 to high impedance. Input signals at
X2 will be internally connected to channel 3 and output
through pins Q3/NQ3. The data input signal SLI en-
tering channel 5 is no longer transmitted through SLO
at channel 2. The data input signal SLI is transmitted
through signals SLo at channel 3.
Input signals at X3 are disabled. The data return input
signals SLi at channel 6 will no longer be transmitted
through channel 3.
Table 6 summarizes each differential channel’s function
in this mode.
Channel Number
1
2
3
4
5
6
Input/Output
disabled
disabled
output
input
input
input
BiSS Signal
-
-
SL output
MA input
SLI
-
Table 6: Differential channel function in BiSS bus loop-
back mode
1 μF
SLO
VDDS
GNDS
X1
NX1
X2
NX2
X3
NX3
VDD
3..5.5V
REVERSE POLARITY PROTECTION GND
1 μF
RS422 Output
HIGH Z
Q1
TRI
HIGH Z
NQ1
Q2
HIGH Z
NQ2
HIGH Z
RS422 output
Q3
TRI
NQ3
SLo
MAi
X4
+
_
TRI
RS422 Input Q4
NQ4
MAi
SLI
X5
+
_
TRI
RS422 Input Q5
NQ5
SLI
RS422 Input Q6
X6
+
_
NQ6
TRI
PTC
ECM
OEN
FMSEL1
FMSEL2
NERRI
BYP EBIS TRI
CONTROL
LOGIC
OVT
PoDo
1
BYPR
ENCODER LINK
REQUEST
DETECTION
OVT
PoDo
OVERTEMP
POWER DOWN
Q1
NQ1
NERR
iC-HF
Figure 15: BiSS bus loopback mode
VDDS
1 μF
GNDS
X1
NX1
VDD
3..5.5V
REVERSE POLARITY PROTECTION GND
1 μF
Encoder Link
Q1
NQ1
X2
Encoder Link
Q2
NX2
NQ2
X3
Encoder Link
Q3
NX3
NQ3
MAi
X4
+
_
TRI
RS422 Input Q4
NQ4
MAi
SLI
X5
+
_
TRI
RS422 Input Q5
NQ5
SLI
SLi
X6
+
_
TRI
RS422 Input Q6
NQ6
SLi
BYP EBIS TRI
PTC
ECM
CONTROL
LOGIC
BYPR ENCODER LINK
Q1
REQUEST
DETECTION
NQ1
OEN
FMSEL1
OVT
OVT
PoDo
OVERTEMP
POWER DOWN
NERR
FMSEL2
PoDo
1
NERRI
iC-HF
Figure 16: Encoder Link State in BiSS bus loopback
mode
Figure 17 shows an example of several sensor nodes
in BiSS bus using each iC-HF for a bus capable
transceiver. The location of the channels has been
modified in the picture to have a clearer view of the
data flow in the bus.
In BiSS bus loopback mode it is possible to enter En-
coder Link State. Only channels 1, 2 and 3 can enter
Encoder Link state in this mode. Signals at pins X1
to X3 are directly linked to output pins Q1 to Q3 and
signals at pins NX1 to NX3 to output pins NQ1 to NQ3.
Altogether, 6 lines are available in BiSS bus loopback
mode under Encoder Link State, as it is shown in Figure
16.
The example shows the case of a broken cable. The
node in the middle is configured as the bus terminator.
Data flow occurs from left to right. When reaching the
middle node, it goes back in the left direction.
The slave nodes typically do not have SLo and SLi
pins. Therefore, pins X3 and X6 should be externally
connected in order to allow proper data flow.