IC-HF Datasheet, PDF (20/36 Pages) IC-Haus GmbH – 6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER

iC-HF
preliminary
6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER
ENCODER LINK SEQUENCE
Rev C1, Page 20/36
All modes A/B/Z and U/V/W, and A/B/Z and BiSS/SSI,
and BiSS bus structure, and BiSS loop back modes
support Encoder Link State. In this state some input
signals at pins Xi and NXi are linked directly to outputs
Qi and NQi. The pins that are linked in the Encoder Link
State depend on the function mode. In A/B/Z U/V/W 9
lines are available, while in the remaining modes there
are 6 lines available. This feature allows having direct
access to analog signals of the sensor from pins Qi/NQi
for calibration purposes.
To enter Encoder Link State, ECM pin must be set hi
and two signals must be input at pins Q1 and NQ1
following a specific timing sequence. This timing se-
quence is called the Encoder Link Sequence. No ad-
ditional pin is needed in to enter Encoder Link State.
ECM can be used to inhibit entering the Encoder Link
State. If ECM is lo, the Encoder Link Sequence will
never be acknowledged.
An example of this sequence is presented in figure 22.
The sequence is divided into three time intervals or
steps: t1, t2 and t3:
• In the first step pins Q1 and NQ1 must be driven
hi during a specific amount of time. This time is
stored by a Finite State Machine and must fulfill
the requirements specified by parameter ts, which
is typically 50 µs (cf. Electrical Characteristics no.
803). Therefore, the following condition must be
satisfied:
ts(min) < t1 < ts(max)
• In the second step, pins Q1/NQ1 must be re-
leased. They will go back to complementary state
(in BiSS bus loopback mode Q1 must be pulled
hi and NQ1 lo externally). Q1/NQ1 must be kept
in complementary state during an amount of time
as close as possible to t1. The maximum allowed
time tolerance is specified by parameter ∆ts, (cf.
Electrical Characteristics no. 804).
(t1 - ∆ts) < t2 < (t1 + ∆ts)
• In the final step Q1 and NQ1 must be driven lo
during an amount of time as close as possible to
t1. The following condition must be fulfilled:
(t1 - ∆ts) < t3 < (t1 + ∆ts)
• After t3 is elapsed, pins Q1/NQ1 must be re-
leased.
• Once released, iC-HF will enter Encoder Link
State.
If any of the steps explained above is not fulfilled, the
Encoder Link Sequence will be interrupted. A new at-
tempt to enter Encoder Link State will have to start from
the beginning of the Encoder Link Sequence.
There are 2 possibilities to exit Encoder Link State.
Driving ECM pin lo will exit the configuration. Normally,
ECM will be connected to VDDS. A power-down event
also exits Encoder Link State, without the need of an
extra pin.
t1
t2
t3
Encoder Link
Q1
NQ1
ECM
PTC
Figure 22: Time diagram of the Encoder Link Sequence