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IC-HF Datasheet, PDF (13/36 Pages) IC-Haus GmbH – 6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER
iC-HF
preliminary
6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER
1 μF
MAo
SLO
SLo
MAi
SLI
SLi
VDDS
GNDS
VDD
3..5.5V
REVERSE POLARITY PROTECTION GND
1 μF
RS422 Output
Q1
X1
TRI
NQ1
MAo
NX1
Q2
X2
RS422 output
NQ2
SLO
NX2
Q3
X3
RS422 output
NQ3
SLo
NX3
RS422 Input Q4
X4
+
_
NQ4
MAi
TRI
RS422 Input Q5
X5
+
_
NQ5
SLI
TRI
RS422 Input Q6
X6
+
_
NQ6
SLi
TRI
PTC
ECM
OEN
FMSEL1
FMSEL2
NERRI
BYP EBIS TRI
CONTROL
LOGIC
OVT
PoDo
1
BYPR
ENCODER LINK
REQUEST
DETECTION
OVT
PoDo
OVERTEMP
POWER DOWN
Q1
NQ1
NERR
iC-HF
Figure 12: BiSS bus structure mode
Rev C1, Page 13/36
VDDS
1 μF
GNDS
X1
NX1
VDD
3..5.5V
REVERSE POLARITY PROTECTION GND
1 μF
Encoder Link
Q1
NQ1
X2
Encoder Link
Q2
NX2
NQ2
X3
Encoder Link
Q3
NX3
NQ3
MAi
X4
+
_
TRI
RS422 Input Q4
NQ4
MAi
SLI
X5
+
_
TRI
RS422 Input Q5
NQ5
SLI
SLi
X6
+
_
TRI
RS422 Input Q6
NQ6
SLi
BYP EBIS TRI
PTC
ECM
CONTROL
LOGIC
BYPR ENCODER LINK
Q1
REQUEST
DETECTION
NQ1
OEN
FMSEL1
OVT
OVT
PoDo
OVERTEMP
POWER DOWN
NERR
FMSEL2
PoDo
1
NERRI
iC-HF
Figure 13: Encoder Link State in BiSS bus structure
mode
In BiSS bus structure mode it is possible to enter En-
coder Link State. Only channels 1, 2 and 3 can enter
Encoder Link state in this mode. Signals at pins X1
to X3 are directly linked to output pins Q1 to Q3 and
signals at pins NX1 to NX3 to output pins NQ1 to NQ3.
Altogether, 6 lines are available in BiSS bus structure
mode under Encoder Link State, as it is shown in Figure
13.
Figure 14 shows an example of connecting several sen-
sor nodes in a BiSS bus structure using iC-HF. The
location of the channels has been modified in the pic-
ture to have a clearer view of the data flow in the bus.
In the example, the slave nodes do not have SLo and
SLi pins. Therefore, pins X3 and X6 should be exter-
nally connected to allow proper data flow.
BiSS SLAVE NODE
BiSS SLAVE NODE
BiSS SLAVE NODE
MAi
SLI
SLO
MAo
SLo SLi
Q4
X4 X5 X3 X6 X2 X1
Q1
MAi
MAo
NQ4
NQ1
Q5
Q2
SLI
SLO
NQ5
Q3
SLo
NQ2
Q6
+
_
SLi
NQ3
NQ6
VDDS
iC-HF FMSEL2
FMSEL1
MAi
SLI
SLO
MAo
SLo SLi
Q4
X4 X5 X3 X6 X2 X1
Q1
MAi
MAo
NQ4
NQ1
Q5
Q2
SLI
SLO
NQ5
Q3
SLo
NQ2
Q6
+
_
SLi
VDDS
NQ3
FMSEL2
FMSEL1
NQ6
iC-HF
MAi
SLI
SLO
MAo
SLo SLi
Q4
X4 X5 X3 X6 X2 X1
Q1
MAi
MAo
NQ4
NQ1
Q5
Q2
SLI
SLO
SLo
VDDS
NQ5
Q3
NQ3
FMSEL2
FMSEL1
NQ2
Q6
+
_
SLi
NQ6
iC-HF
Figure 14: Several slave nodes in BiSS bus structure
BiSS bus loopback
If FMSEL2 = 1 and FMSEL1 = 0, iC-HF is configured
in BiSS bus loopback mode. This mode is a particular
case of BiSS bus structure mode, where iC-HF is op-
erated as the termination node/loopback of the BiSS
bus.
BiSS bus loopback allows addressing the case where
the BiSS Bus is damaged. If the bus is somehow dam-
aged, e.g. a broken wire, data will be interrupted and
no communication will be possible. The last node pre-
vious to the point of damage can be configured as a
termination node of the BiSS bus by setting FMSEL = 0,
avoiding the need of re-wiring last node’s output chan-
nels. Therefore communication between nodes before
the damage point will still be possible. iC-HF does