IC-HT_15 Datasheet, PDF (27/45 Pages) IC-Haus GmbH – DUAL CW LASER DIODE DRIVER

iC-HT
DUAL CW LASER DIODE DRIVER
10 BIT LINEAR A/D CONVERTER
preliminary
Rev B1, Page 27/45
A 10 bit linear A/D converter is available for each chan-
nel when working in MCU mode. A variety of voltages
can be measured by the converter with two resolutions:
• V(LDKx) up to 8 V with 8.6 mV resolution
• V(VDD) up to 8 V with 8.6 mV resolution
• V(VB) up to 8 V with 8.6 mV resolution
• V(MDAx) up to 1 V with 1.075 mV resolution
• V(PLRx) up to 1 V with 1.075 mV resolution
Note that when the value to be converted is higher than
8 V the A/D converter is saturated at its highest conver-
sion value.
The register bits ADCCx select the signal measured
with the 10 bit A/D converter.
ADCC1(2:0)
Addr. 0x10; bit 7:5
R/W 000
0xx
Channel 1 ADC disabled
100
Channel 1 ADC sourced by V(MDA1), ADSNF1 = 0
100
Channel 1 ADC sourced by V(PLR1), ADSNF1 = 1
101
Channel 1 ADC sourced by V(VB)
110
Channel 1 ADC sourced by V(VDD)
111
Channel 1 ADC sourced by V(LDK1)
When enabled, the A/D converter is continuously ac-
quiring the signal selected by ADCCx register. The
conversion time, is 140 µs. Changing the source re-
quires 500 µs settling time.
In order to do a measurement, register ADCx must be
read. The converter does not provide an end of con-
version (EOC) bit. Instead, ADCx register contains al-
ways the value of the last conversion.
As the A/D converter is 10 bit long, the results are split
into two byte wide separated registers; ADCxh con-
tains channel x ADC MSBs values while ADCxl stores
the LSBs. A consecutive read action of both registers
(lower and upper part) should be carried out in order
to prevent an undesired change in the measured value
between two read actions.
ADC1
Addr. 0x03/04; bit 9:0
R
0x000
ADC minimum value
0x3FF
ADC maximum value
Table 58: ADC channel 1
Table 54: ADC channel 1 source selection
ADCC2(2:0)
Addr. 0x15; bit 7:5
R/W 000
0xx
Channel 2 ADC disabled
100
Channel 2 ADC sourced by V(MDA2), ADSNF2 = 0
100
Channel 2 ADC sourced by V(PLR2), ADSNF2 = 1
101
Channel 2 ADC sourced by V(VB)
110
Channel 2 ADC sourced by V(VDD)
111
Channel 2 ADC sourced by V(LDK2)
Table 55: ADC channel 2 source selection
ADC2
Addr. 0x05/06; bit 9:0
R
0x000
ADC minimum value
0x3FF
ADC maximum value
Table 59: ADC channel 2
The voltage corresponding to the measured digital
value can be directly obtained through the following
formula:
V (LDKx, VB, VDD)
=8∗
VFS
1023
∗ ADCx
With ADCCx(2:0) = 100, the signal to the A/D con-
verter is selected by register bit ADSNFx (A/D con-
verter sense not force). With ADSNFx = 1 the mea-
suring point to the A/D converter is the internal sense
node of the internal programmable logarithmic monitor
resistor (PLR). With ADSNFx = 0 the sensing point is
connected directly to MDAx pin.
V (MDAx, PLRx)
=
VFS
1023
∗ ADCx
VFS is the fullscale voltage of the A/D converter (cf.
Electrical Characteristics No. 706) typical 1.1 V. For a
more precise measurement, the A/D converter can be
calibrated by measuring a known VB voltage and cal-
culate the VFS.
ADSNF1
0
1
Addr. 0x1A; bit 2
ADC measurement MDA1 pin (force)
ADC measurement PLR1 (sense)
R/W 0
Table 56: ADC channel 1 sense/force selection
ADSNF2
0
1
Addr. 0x1A; bit 6
ADC measurement MDA2 pin (force)
ADC measurement PLR2 (sense)
R/W 0
If ADSNFx = 0 the sensing point is connected directly
to MDAx pin. Depending on the regulation voltage, it
is possible that V(MDAx) is higher than 1.1 V. When
MDAx pin is the source of the A/D converter, satura-
tion of the converter will occur. When monitoring pin
MDAx with the A/D converter, V(MDAx) must be lower
than 1.1 V.
Table 57: ADC channel 2 sense/force selection