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IC-HT_15 Datasheet, PDF (18/45 Pages) IC-Haus GmbH – DUAL CW LASER DIODE DRIVER
iC-HT
DUAL CW LASER DIODE DRIVER
preliminary
Rev B1, Page 18/45
error bit OVCx will be set to 1, the error will be signaled
through NCHK and the corresponding laser channel
will be disabled. The overcurrent error will remain
forced until SOVCx = 0.
SOVC1
0
1
Addr. 0x1D; bit 5
R/W 0
No overcurrent event at channel 1 is simulated.
Overcurrent event at channel 1 simulated.
Table 29: Simulate overcurrent channel 1
ACC mode permits to combine both channels in one
iC-HT (see chapter COMBINING BOTH CHANNELS)
and several iC-HT in parallel. When both channels are
combined the programmable overcurrent shutdown is
by channel. Another option is to connect the LDK
together when both channels are configured in ACC
mode and the channel 1 with high current range con-
figuration and the channel 2 with low current range
configuration. With this pre-sets there is a granularity
about 0.2% using the channel 1 steps regulation and
about 0.03% using the channel 2 in the regulation.
SOVC2
0
1
Addr. 0x1D; bit 6
R/W 0
No overcurrent event at channel 2 is simulated.
Overcurrent event at channel 2 simulated.
Table 30: Simulate overcurrent channel 2
An external capacitor can be added in ACC mode in
order to avoid oscillations as it is shown in figure 8.
The external CIx must be enabled setting the ECIEx
bit (Tables 93 and 106).
In ACC mode, the MDAx pin can be monitored through
a 10 bit A/D converter. This can be used for measur-
ing the laser light power, if a photodiode is connected
to pin MDAx, as it is shown in figure 9. This allows ad-
justing the voltage reference in order to set the laser
current and obtain the desired laser light power.
The internal programmable logarithmic monitor Resis-
tor (PLR), if enabled (DISPx = 0), gives feedback for
the current control through the 10 bit A/D converter.
Register bit ADSNFx must be set to 1 in order to mea-
sure the internal sense node. An external monitor
resistor can be used to measure the optical power,
achieved by setting DISPx to 1. Therefore register bit
ADSNFx must be set to 0 in order to measure directly
at pin MDAx.
The Regulator
In MCU mode the control can be carried out without
the need of external capacitor. This allows a fast re-
sponse of the regulator. The speed of the regulator’s
response and stability can be configured using three
bits (COMPx), providing a compensation factor.
COMP1
000
...
111
Addr. 0x13; bit 6:4
R/W 011
Minimum compensation for the channel 1 regulator,
slower response of regulator
Maximum compensation for the channel 1
regulator, faster response of regulator
Table 31: Regulator delay compensation channel 1
COMP2
000
...
111
Addr. 0x18; bit 6:4
R/W 011
Minimum compensation for the channel 2 regulator,
slower response of regulator
Maximum compensation for the channel 2
regulator, faster response of regulator
Table 32: Regulator delay compensation channel 2
Alternatively it is possible to use external capacitors
connected to pins CIx and CILx. In this case, register
bit ECIEx should be set to 1 and COMPx to its highest
value, "111".
ACC
DCO
8 Bit
D
A
OVC1
RACC1
LDK1
10 Bit
D
+
A
-
10 Bit
A
D
LDK1
VDD
VB
ECIE1
CI1
CIL1
AGND1
MDA1
ADSNF1
EM C
R
8 Bit
0
LASER CHANNEL 1
APC
DISP1
255
PLR1
MRL1
N
I LDK
CI1
..10 nF..
Figure 9: ACC with monitor photodiode
ECIE1
0
1
Addr. 0x10; bit 1
R/W 0
External CI capacitor for channel 1 disconnected
External CI capacitor for channel 1 connected
Table 33: Enable external capacitor channel 1
ECIE2
0
1
Addr. 0x15; bit 1
R/W 0
External CI capacitor for channel 2 disconnected
External CI capacitor for channel 2 connected
Table 34: Enable external capacitor channel 2
The regulator is offset compensated in order to pre-
vent optical power drifts. Offset compensation can be
disabled by setting register bit EOCx to 0.