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IC-NQ Datasheet, PDF (21/25 Pages) IC-Haus GmbH – 13-bit Sin/D CONVERTER WITH CALIBRATION | |||
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iC-NQ
13-bit Sin/D CONVERTER WITH CALIBRATION
Sensor Data Output in SSI Format
With SELSSI = 1 the communication timing is switched
to SSI compatibility. Data output is in binary format
starting with the MSB. It can be conï¬gured if the error
bits are to be send afterwards.
CFGSSI
Code
0x00
0x01
0x02
0x03
Rev D1, Page 21/25
Adr 0x03, Bit 7:6
Additional bits
E1, E0, zero bit
none
E1, E0, zero bit
none
Ring register operation
no
no
yes
yes
Table 38: SSI Output
Examples of SSI formats
SSI Output Formats
13-bit SSI
Res Mode Error CRC T1 T2 T3 T4... T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 T24 T25
10 bit SSI X
-
S9 S8 S7 S6 ... S0 E1 E0 0 Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop
Example
0000000000000
13 bit SSI -
-
S12 S11 S10 S9 ... S3 S2 S1 S0 Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop
*1
SSI-R -
*2
Example
000000000000
-
S12 S11 S10 S9 ... S3 S2 S1 S0 Stop S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2
25-bit SSI
13 bit SSI
8 + 13 SSI
bit*3
Example
0
X
-
S12 S11 S10 S9 ... S3 S2 S1 S0 E1 E0 0 Stop Stop Stop Stop Stop Stop Stop Stop Stop
Example
0000000000
X
-
P7 P6 P5 P4 ... P0, S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 E1 E0 0 Stop
S12, S11
Example
00
Conï¬guration Input SLI = 0, SELSSI = 1 CFGMCD = 0x00, CFGSSI = 0x00, unless otherwise noted.
*1 CFGSSI = 0x01; *2 CFGSSI = 0x03; *3 CFGMCD = 0x01
Caption SSI protocol
SSI ring operation
Table 39: SSI Output Formats
EEPROM INTERFACE
Serial EEPROM components permitting operation
from 3.3 V to 5 V can be connected (such as 24C02, for
example). When the device is switched on the memory
area of bytes 0 to 15 is mapped onto iC-NQâs registers.
The higher memory areas, bytes 16-111, are readily
available to the system via BiSS. The EEPROM ad-
dresses 0-111 are mapped onto the BiSS addresses
16-127. If no EEPROM is connected the device must
be conï¬gured via BiSS and address 0 written last. In
this case iC-NQ does not respond to addresses 16-
119; reading addresses 120-127 sends the device ID
plus the contents of register 0 to address 124.
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