IC-NQ Datasheet, PDF (17/25 Pages) IC-Haus GmbH – 13-bit Sin/D CONVERTER WITH CALIBRATION

iC-NQ
13-bit Sin/D CONVERTER WITH CALIBRATION
SIGNAL MONITORING and ERROR MESSAGES
Rev D1, Page 17/25
SELAMPL
AMPL
Code
0x00
0x01
0x02
0x03
Code
0x04
0x05
0x06
0x07
Notes
Adr 0x0C, Bit 2
Adr 0x0C, Bit 1:0
Max ( |Sin| , |Cos| )
Voltage threshold V_th
Output amplitude*
0.60 x VDDA
1.4 V_pp (0.28 x VDDA)
0.64 x VDDA
2.0 V_pp (0.40 x VDDA)
0.68 x VDDA
2.6 V_pp (0.51 x VDDA)
0.72 x VDDA
Sin² + Cos²
3.1 V_pp (0.62 x VDDA)
V_thmin ↔ V_thmax
Output amplitude*
0.48 ↔ 0.68 x VDDA
2.4 V_pp ↔ 3.4 V_pp
0.56 ↔ 0.76 x VDDA
2.8 V_pp ↔ 3.8 V_pp
0.64 ↔ 0.84 x VDDA
3.2 V_pp ↔ 4.2 V_pp
0.72 ↔ 0.92 x VDDA
3.6 V_pp ↔ 4.6 V_pp
*) Entries are calculated with VDDA = 5 V.
Table 24: Signal Amplitude Monitoring
Vss
Vth
Figure 15: Signal monitoring of minimum amplitude.
Vthmax
Vthmin
Figure 16: Sin² + Cos² signal monitoring.
AERR
Code
0x00
0x01
Adr 0x03, Bit 1
Amplitude error message
disabled
enabled
Table 25: Amplitude Error
FERR
Code
0x00
0x01
Note
Adr 0x03, Bit 0
Excessive frequency error message
disabled
enabled
Input frequency monitoring is operational for
resolutions ≥ 16
Table 26: Frequency Error
Configuration Error
-
Messaging always released
Table 27: Configuration Error
Error Keys
Failure Mode
No error
Amplitude error
Frequency error
Configuration
Undervoltage
System error
Pin NERR
HI
LO/HI = 75 %
(AERR = 0: HI)
LO/HI = 50 %
(FERR = 0: HI)
LO
LO
NERR = low caused
by an external error
signal
Error bits E1, E0 with
BiSS and SSI
11
01
(11)
10
(11)
00
00
00
Table 28: Error Keys
Each phase in the configuration process is signaled by
NERR = low; the signal is only reset following a suc-
cessful CRC (cyclic redundancy check).
If the data transfer from the EEPROM is faulty and the
CRC unsuccessful, then the configuration phase is au-
tomatically repeated.
The process aborts following a third unsuccessful at-
tempt and the error message output remains set to low
until a write access occurs at address 0 via the BiSS
Interface (internal reset).
To enable the successful diagnosis of faults other types
of error are signaled at NERR using a PWM code as
given in the key on the left.
Two error bits are provided to enable communication
via the BiSS Interface; these bits can decode four dif-
ferent types of error. If NERR is held at low by an ex-
ternal source, such as an error message from the sys-
tem, for example, this can also be verified via the BiSS
Interface.
Error events are stored for the BiSS sensor data output
and deleted afterwards. Errors at NERR are displayed
for a minimum of ca. 10 ms, as far as no BiSS readout
causes a deletion.
If an error in amplitude occurs the conversion pro-
cess is terminated and the incremental output signals
halted. An error in amplitude rules out the possibility of
an error in frequency.