HY57V643220D Datasheet, PDF (9/13 Pages) Hynix Semiconductor – 4Banks x 512K x 32bits Synchronous DRAM

HY57V643220D(L/S)T(P) Series
4Banks x 512K x 32bits Synchronous DRAM
DC CHARACTERISTICS II (TA= 0 to 70^oC)
Parameter
Sym-
bol
Test Condition
Speed
45 5 55 6
Unit Note
7
Operating Current
IDD1
Burst length=1, One bank active
tRC ≥ tRC(min), IOL=0mA
220 200 190 180 170 mA 1
Precharge Standby Cur- IDD2P CKE ≤ VIL(max), tCK = 15ns
rent
in Power Down Mode ^{IDD2PS CKE ≤ VIL(max), tCK = ∞}
2
mA
2
mA
CKE ≥ VIH(min), CS ≥ VIH(min), tCK
= 15ns
Precharge Standby Cur- _{IDD2N Input signals are changed one time}
17
rent
in Non Power Down
during 2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
mA
Mode
IDD2NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
12
Active Standby Current ^{IDD3P CKE ≤ VIL(max), tCK = 15ns}
in Power Down Mode _{IDD3PS CKE ≤ VIL(max), tCK = ∞}
3
mA
3
CKE ≥ VIH(min), CS ≥ VIH(min), tCK
= 15ns
Active Standby Current ^{IDD3N Input signals are changed one time}
40
in Non Power Down
during 2clks.
mA
Mode
All other pins ≥ VDD-0.2V or ≤ 0.2V
IDD3NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
30
Burst Mode Operating
Current
IDD4
tCK ≥ tCK(min), IOL=0mA
All banks active
CL=3
290 280 260 240 210 mA
1
Auto Refresh Current IDD5 tRC ≥ tRC(min), All banks active
260 250 235 220 210 mA 2
Normal
2
mA 3
Self Refresh Current IDD6 CKE ≤ 0.2V
Low Power
0.8
Super Low
Power
450
mA 4
uA 5
Note :
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. Min. of tRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3. HY57V643220DT(P) Series
4. HY57V643220DLT(P) Series
5. HY57V643220DST(P) Series
Rev. 0.3 / Sep. 2004
9