HY57V643220D Datasheet, PDF (1/13 Pages) Hynix Semiconductor – 4Banks x 512K x 32bits Synchronous DRAM

HY57V643220D(L/S)T(P) Series
4Banks x 512K x 32bits Synchronous DRAM
Document Title
4Bank x 512K x 32bits Synchronous DRAM
Revision History
Revision
No.
0.1
0.2
0.3
History
Initial Draft
Removed Preliminary
1. Updated Output Load Capacitance for Access Time Measurement CL = 30pF
in AC OPERATING TEST CONDITION
2. Updated the tolerance zone of the leads and the description of the package
type in PACKAGE DIMENSION
Draft Date
May. 2004
July 2004
Remark
Preliminary
Sep. 2004
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev. 0.3 / Sep. 2004
1