HY62V8100B Datasheet, PDF (8/12 Pages) Hynix Semiconductor – 128K x8 bit 3.3V Low Power CMOS slow SRAM

HY62V8100B Series
DATA RETENTION ELECTRIC CHARACTERISTIC
TA=0°C to 70°C / -25°C to 85°C (E) / -25¡ Éto 85¡ É(I)
Sym
Parameter
Test Condition
VDR Vcc for Data Retention
/CS1>Vcc-0.2V or CS2<0.2V,
VIN > Vcc-0.2V or VIN < Vss+0.2V
ICCDR Data
HY62V8100B Vcc=3.0V,
Retention HY62V8100B-E /CS1>Vcc - 0.2V or CS2<0.2V,
Current
HY62V8100B-I VIN > Vcc-0.2V or VIN > Vss+0.2V
tCDR Chip Deselect to Data
See Data Retention Timing
Retention Time
Diagram
tR
Operating Recovery Time
Notes:
1. Typical values are under the condition of TA = 25°C.
2. tRC is read cycle time.
Min Typ Max Unit
2.0
-
-
V
-
0.5 10 uA
-
0.5 15 uA
-
0.5 15 uA
0
-
-
ns
tRC(2)
-
-
ns
DATA RETENTION TIMING DIAGRAM 1
VCC
3.0V
2.2V
VDR
CS1
VSS
DATA RETENTION MODE
tCDR
tR
CS1>VCC-0.2V
DATA RETENTION TIMING DIAGRAM 2
VCC
3.0V
CS2
VDR
0.4V
VSS
DATA RETENTION MODE
tCDR
tR
CS2<0.2V
Rev 13 / Apr. 2001
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