HY27UH08AG5B Datasheet, PDF (8/51 Pages) Hynix Semiconductor – 16Gbit (2Gx8bit) NAND Flash

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HY27UH08AG5B Series
16Gbit (2Gx8bit) NAND Flash
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
5th Cycle
IO0
A0
A8
A12
A20
A28
IO1
A1
A9
A13
A21
A29
IO2
A2
A10
A14
A22
A30
IO3
A3
A11
A15
A23
L⁽¹⁾
IO4
A4
L⁽¹⁾
A16
A24
L⁽¹⁾
IO5
A5
L⁽¹⁾
A17
A25
L⁽¹⁾
IO6
A6
L⁽¹⁾
A18
A26
L⁽¹⁾
IO7
A7
L⁽¹⁾
A19
A27
L⁽¹⁾
NOTE:
1. L must be set to Low.
Table 3: Address Cycle Map(x8)
FUNCTION
READ1
READ FOR COPY-BACK
READ ID
RESET
PAGE PROGRAM
COPY BACK PGM
MULTI PLANE PROGRAM
MULTI PLANE COPYBACK
PROGRAM
BLOCK ERASE
MULTI PLANE
BLOCK ERASE
READ STATUS REGISTER
RANDOM DATA INPUT
RANDOM DATA OUTPUT
READ CACHE (RANDOM)
READ CACHE (SEQUENTIAL)
READ CACHE END
READ EDC STATUS REGISTER
1st CYCLE 2nd CYCLE 3rd CYCLE 4th CYCLE
00h
30h
-
-
00h
35h
-
-
90h
-
-
-
FFh
-
-
-
80h
10h
-
-
85h
10h
-
-
80h
11h
81h
10h
85h
11h
81h
10h
60h
D0h
-
-
60h
60h
D0h
-
70h
-
-
-
85h
-
-
-
05h
E0h
-
-
00h
31h
-
-
31h
-
-
-
3Fh
-
-
-
7Bh
-
-
-
Table 4: Command Set
Acceptable command
during busy
Yes
Yes
Rev 0.2 / Jan. 2008
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