HC2509C Datasheet, PDF (4/6 Pages) Hynix Semiconductor – Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications

HC2509C
March 1999
Table 3. Recommended Operating Conditions
Symbol
AVcc
VIH
VIL
VI
IOH
IOL
TA
Parameter
Supply Voltage
High-level Input Voltage
Low-level Input Voltage
Input Voltage
High-level Output Current
Low-level Output Current
Operating Free-air Temperature
Value
Min Max
3
3.6
2
0.8
0
Vcc
-12
12
0
85
Unit
V
V
V
V
mA
mA
°C
Condition
Table 4. Electrical Characteristics Over Recommended Operating
Free-air Temperature Range
Symbol
VIK
VOH
Value
Min
Typ
Vcc - 0.2
2.1
2.4
VOL
II
ICC
C
Ci
4
Co
6
Max
-1.2
0.2
0.8
0.55
±5
10
500
Unit
V
V
V
µA
µA
µA
pF
pF
Vcc (V)
Test Conditions
3
Min to Max
3
3
Min to Max
3
3
3.6
3.6
3.3 to 3.6
3.3
3.3
II = -18mA
IOH = -100µA
IOH = -12 mA
IOH = -6 mA
IOL = 100µA
IOL = 12 mA
IOL = 6 mA
VI =Vcc or GND
VI =Vcc or GND, Io = 0
Ouputs: low or high
One input at Vcc - 0.6V, Other
Inputs at Vcc or GND
VI = Vcc or GND
Vo = Vcc or GND
Table 5.Timing Requirements Over Recommended Ranges of Supply Voltage
and Operating Free-air Temperature
Symbol
Parameter
Value
Min
fclock
Clock Frequency
25
Input Clock Duty Cycle
40
Stabilization Time♣
♣ Time to obtain phase lock of its feedback signal to its reference signal.
Max
125
60
1
Unit
MHz
%
ms
4