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| HC2509C Datasheet, PDF (2/6 Pages) Hynix Semiconductor – Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications | |||
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Functional Block Diagram
1G 11
2G 14
CLK
24
PLL
FBIN
13
AVcc 23
2
HC2509C
March 1999
3
1Y0
4
1Y1
5
1Y2
8
1Y3
9
1Y4
21
2Y0
20
2Y1
17
2Y2
16
2Y3
12 FBOUT
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