HY628100A Datasheet, PDF (3/9 Pages) Hynix Semiconductor – 128Kx8bit CMOS SRAM

HY628100A Series
DC ELECTRICAL CHARACTERISTICS
Vcc = 5.0V±10%, TA = 0°C to 70°C, unless otherwise specified
Symbol
Parameter
Test Condition
ILI
Input Leakage Current
Vss < VIN < Vcc
ILO
Output Leakage Current Vss < VOUT < Vcc, /CS1 = VIH or
CS2 = VIL or /OE = VIH or /WE = VIL
Icc
Operating Power Supply /CS1 = VIL, CS2 = VIH,
Current
VIN = VIH or VIL, II/O = 0mA
ICC1
Average Operating
/CS1 = VIL CS2 = VIH,
Current
Min Duty Cycle = 100%, II/O = 0mA
ISB
TTL Standby Current
/CS1 = VIH or CS2 = VIL
(TTL Input)
ISB1
Standby Current
/CS1 > Vcc - 0.2V
(CMOS Input)
CS2 > 0.2V or
L
CS2 > Vcc - 0.2V
LL
VOL
Output Low Voltage
IOL = 2.1Ma
VOH
Output High Voltage
IOH = -1mA
Min. Typ. Max. Unit
-1
-
1
uA
-1
-
1
uA
-
5
10 mA
- 30 50 mA
-
1
2
mA
-
-
1
mA
-
2 100 uA
-
1
20 uA
-
-
0.4
V
2.4 -
-
V
Note : Typical values are at Vcc = 5.0V, TA = 25°C
AC CHARACTERISTICS
Vcc = 5.0V±10%, TA = 0°C to 70°C (Normal), unless otherwise specified
# Symbol
Parameter
-55
Min. Max.
-70
Min. Max.
-85
Min Max.
Unit
READ CYCLE
1 TRC Read Cycle Time
55
-
70
-
85
- ns
2 tAA* Address Access Time
-
55
-
70
-
85 ns
3 tACS* Chip Select Access Time
-
55
-
70
-
85 ns
4 TOE Output Enable to Output Valid
-
25
-
35
-
45 ns
5 TCLZ Chip Select to Output in Low Z
10
-
10
-
10
- ns
6 TOLZ Output Enable to Output in Low Z
5
-
5
-
5
- ns
7 tCHZ Chip Deselection to Output in High Z
0
20
0
25
0
30 ns
8 tOHZ Out Disable to Output in High Z
0
20
0
25
0
30 ns
9 tOH Output Hold from Address Change
10
-
10
-
10
- ns
WRITE CYCLE
10 tWC Write Cycle Time
55
-
70
-
85
- ns
11 tCW Chip Selection to End of Write
45
-
60
-
70
- ns
12 tAW Address Valid to End of Write
45
-
60
-
70
- ns
13 tAS
Address Set-up Time
0
-
0
-
0
- ns
14 tWP Write Pulse Width
40
-
50
-
55
- ns
15 tWR Write Recovery Time
0
-
0
-
0
- ns
16 tWHZ Write to Output in High Z
0
20
0
25
0
30 ns
17 tDW Data to Write Time Overlap
25
-
30
-
35
- ns
18 tDH Data Hold from Write Time
0
-
0
-
0
- ns
19 tOW Output Active from End of Write
5
-
5
-
5
- ns
Comment : tAA* and tACS* can meet 50ns with 30pF test load.
Rev.05 /Feb.99
3