HY628100A Datasheet, PDF (1/9 Pages) Hynix Semiconductor – 128Kx8bit CMOS SRAM

HY628100A Series
128Kx8bit CMOS SRAM
DESCRIPTION
FEATURES
The HY628100A is a high speed, low power and
1M bit CMOS Static Random Access Memory
organized as 131,072 words by 8bit. The
HY628100A uses high performance CMOS
process technology and designed for high speed
low power circuit technology. It is particulary well
suited for used in high density low power system
application. This device has a data retention
mode that guarantees data to remain valid at a
minimum power supply voltage of 2.0V.
• Fully static operation and Tri-state output
• TTL compatible inputs and outputs
• Battery backup(L/LL-part)
- 2.0V(min) data retention
• Standard pin configuration
- 32pin 525mil SOP
- 32pin 8x20mm TSOP-I(Standard)
Product
Voltage Speed
Operation
No
(V)
(ns) Current(mA)
HY628100A
5.0 55/70/85
10
Comment : 50ns is available with 30pF test load.
Standby Current(uA)
L
LL
1mA 100 20
Temperature
(°C)
0~70
PIN CONNECTION
NC
1
32
A16
2
31
A14
3
30
A12
4
29
A7
5
28
A6
6
27
A5
7
26
A4
8
25
A3
9
24
A2 10
23
A1 11
22
A0 12
21
I/O1 13
20
I/O2 14
19
I/O3 15
18
Vss 16
17
SOP
Vcc
A15
CS2
/WE
A13
A8
A9
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
A11 1
A9 2
3
A13 4
/WE 5
CS2 6
A15 7
Vcc 8
NC 9
A16
11
A12 12
A7 13
A6 14
A5 15
A4 16
32 /OE
30 /CS1
29 DQ8
28 DQ7
27 DQ6
26 DQ5
25 DQ4
24 Vss
DQ3
22
21 DQ1
20 A0
19 A1
18 A2
17 A3
TSOP-I(Standard)
PIN DESCRIPTION
Pin Name
/CS1
CS2
/WE
/OE
A0 ~ A16
I/O1 ~ I/O8
Vcc
Vss
Pin Function
Chip Select 1
Chip Select 2
Write Enable
Output Enable
Address Input
Data Input/Output
Power(5.0V)
Ground
BLOCK DIAGRAM
A0
ROW DECODER
I/O1
A16
/CS1
CS2
/OE
/WE
MEMORY ARRAY
1024x1024
I/O8
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.05 /Feb.99
Hyundai Semiconductor