HY29F400 Datasheet, PDF (3/40 Pages) Hynix Semiconductor – 4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory

PIN CONFIGURATIONS
NC
1
RY/BY#
2
A17
3
A7
4
A6
5
A5
6
A4
7
A3
8
A2
9
A1
10
A0
11
CE#
12
V _SS
13
OE#
14
DQ0
15
DQ8
16
DQ1
17
DQ9
18
DQ2
19
DQ10
20
DQ3
21
DQ11
22
44
RESET#
43
WE#
42
A8
41
A9
40
A10
39
A11
38
A12
37
A13
36
A14
35
A15
34
A16
33
BYTE#
32
V _SS
31
DQ15/A-1
30
DQ7
29
DQ14
28
DQ6
27
DQ13
26
DQ5
25
DQ12
24
DQ4
23
V _CC
A15
1
A14
2
A13
3
A12
4
A11
5
A10
6
A9
7
A8
8
NC
9
NC
10
WE#
11
RESET#
12
NC
13
NC
14
RY/BY#
15
NC
16
A17
17
A7
18
A6
19
A5
20
A4
21
A3
22
A2
23
A1
24
Standard
TSOP48
HY29F400
48
A16
47
BYTE#
46
V _SS
45
DQ15/A-1
44
DQ7
43
DQ14
42
DQ6
41
DQ13
40
DQ5
39
DQ12
38
DQ4
37
V _CC
36
DQ11
35
DQ3
34
DQ10
33
DQ2
32
DQ9
31
DQ1
30
DQ8
29
DQ0
28
OE#
27
V _SS
26
CE#
25
A0
A16
1
BYTE#
2
V _SS
3
DQ15/A-1
4
DQ7
5
DQ14
6
DQ6
7
DQ13
8
DQ5
9
DQ12
10
DQ4
11
V _CC
12
DQ11
13
DQ3
14
DQ10
15
DQ2
16
DQ9
17
DQ1
18
DQ8
19
DQ0
20
OE#
21
V _SS
22
CE#
23
A0
24
Reverse
TSOP48
48
A15
47
A14
46
A13
45
A12
44
A11
43
A10
42
A9
41
A8
40
NC
39
NC
38
WE#
37
RESET#
36
NC
35
NC
34
RY/BY#
33
NC
32
A17
31
A7
30
A6
29
A5
28
A4
27
A3
26
A2
25
A1
CONVENTIONS
Unless otherwise noted, a positive logic (active
High) convention is assumed throughout this docu-
ment, whereby the presence at a pin of a higher,
more positive voltage (nominally 5VDC) causes
assertion of the signal. A ‘#’ symbol following the
signal name, e.g., RESET#, indicates that the sig-
nal is asserted in a Low state (nominally 0 volts).
Rev. 5.2/May 01
Whenever a signal is separated into numbered
bits, e.g., DQ[7], DQ[6], ..., DQ[0], the family of
bits may also be shown collectively, e.g., as
DQ[7:0].
The designation 0xNNNN (N = 0, 1, 2, . . . , 9, A, .
. . , E, F) indicates a number expressed in hexadeci-
mal notation. The designation 0bXXXX indicates a
number expressed in binary notation (X = 0, 1).
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