HY5DU12822DFP-D43 Datasheet, PDF (28/29 Pages) Hynix Semiconductor – 512Mb DDR SDRAM

CAPACITANCE (TA=25^oC, f=100MHz)
1
HY5DU12822DF(P) / HY5DU121622DF(P)
Parameter
Input Clock Capacitance
Delta Input Clock Capacitance
Input Capacitance
Delta Input Capacitance
Input / Output Capacitance
Delta Input / Output Capacitance
Pin
CK, /CK
CK, /CK
All other input-only pins
All other input-only pins
DQ, DQS, DM
DQ, DQS, DM
Symbol
Min
CI1
1.5
Delta CI1
-
CI1
1.5
Delta CI2
-
CIO
3.5
Delta CIO
-
Max
2.5
0.25
2.5
0.5
4.5
0.5
Unit
pF
pF
pF
pF
pF
pF
Note:
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
VTT
RT=50Ω
Output
Zo=50Ω
CL=30pF
VREF
Rev 1.0 / May 2007
28