HY5PS1G431CFP Datasheet, PDF (20/37 Pages) Hynix Semiconductor – 1Gb DDR2 SDRAM

3.5. Input/Output Capacitance
HY5PS1G431C(L)FP
HY5PS1G831C(L)FP
HY5PS1G1631C(L)FP
Parameter
Input capacitance, CK and CK
Input capacitance delta, CK and CK
Input capacitance, all other input-only pins
Input capacitance delta, all other input-only pins
Input/output capacitance, DQ, DM, DQS, DQS
Input/output capacitance delta, DQ, DM, DQS, DQS
Symbol
CCK
CDCK
CI
CDI
CIO
CDIO
DDR2 400
DDR2 533
Min Max
1.0
2.0
x
0.25
1.0
2.0
x
0.25
2.5
4.0
x
0.5
DDR2 667
DDR2 800
Min Max
1.0
2.0
x
0.25
1.0
2.0
x
0.25
2.5
3.5
x
0.5
Units
pF
pF
pF
pF
pF
pF
4. Electrical Characteristics & AC Timing Specification
( 0 ϒ⊃ ϒℜ T_CASE ϒℜ 95ϒ⊃ ; V_DDQ = 1.8 V +/- 0.1V; V_DD = 1.8V +/- 0.1V)
Refresh Parameters by Device Density
Parameter
Refresh to Active/Refresh command
time
Symbol
tRFC
256Mb 512Mb 1Gb 2Gb 4Gb Units
75
105 127.5 195 327.5 ns
0 ϒ⊃ ϒℜ T_CASE ϒℜ 95ϒ⊃ 7.8
Average periodic refresh interval _tREFI
85ϒ⊃ ≤… T_CASE ϒℜ 95ϒ⊃ 3.9
7.8 7.8 7.8 7.8 ns
3.9 3.9 3.9 3.9 ns
DDR2 SDRAM speed bins and tRCD, tRP and tRC for corresponding bin
Speed
Bin(CL-tRCD-tRP)
Parameter
CAS Latency
tRCD
tRP^Note1
tRAS
tRC
DDR2-800
5-5-5
6-6-6
min
min
5
6
12.5
15
12.5
15
45
45
57.5
60
DDR2-667
4-4-4
5-5-5
min
min
4
5
12
15
12
15
45
45
57
60
DDR2-533 DDR2-400 Units
4-4-4
3-3-3
min
min
4
3
tCK
15
15
ns
15
15
ns
45
40
ns
60
55
ns
Note 1: 8 bank device Precharge All Allowance : tRP for a Precharge All command for an 8 Bank device will equal to
tRP+1*tCK, where tRP are the values for a single bank Πρεχηαργε, which are shown in the table above.
Rev. 0.2 /Dec 2006
20