HY5S5B2CLFP-6E Datasheet, PDF (18/54 Pages) Hynix Semiconductor – 256M (8Mx32bit) Mobile SDRAM

11
256Mbit (8Mx32bit) Mobile SDR Memory
HY5S5B2CLF(P) Series
COMMAND TRUTH TABLE
Function
Mode Register Set
Extended Mode Register Set
No Operation
Device Deselect
Bank Active
Read
Read with Autoprecharge
Write
Write with Autoprecharge
Precharge All Banks
Precharge selected Bank
Burst stop
Data Write/Output Enable
Data Mask/Output Disable
Auto Refresh
Self Refresh Entry
Self Refresh Exit
Precharge Power Down Entry
Precharge Power Down Exit
Clock Suspend Entry
Clock Suspend Exit
Deep Power Down Entry
Deep Power Down Exit
CKEn-1 CKEn
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
CS
RAS
CAS
WE
DQM
ADDR
A10
/AP
BA Note
L
L
L
L
L
L
L
L
L
H
H
H
H
X
X
X
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
L
L
H
L
L
L
L
H
L
L
L
H
L
L
H
H
L
X
X
L
L
L
H
L
L
L
H
H
X
X
X
L
H
H
H
H
X
X
X
L
H
H
H
H
X
X
X
L
H
H
H
H
X
X
X
L
V
V
V
X
L
H
H
L
X
X
Op Code
2
X
Op Code
2
X
X
X
X
X
Row Address
V
Column L
V
X Column H
V
X Column L
V
X Column H
V
X
X
H
X
X
X
L
V
X
X
X
X
V
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
Note: 1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high.
2. BA1/BA0 must be issued 0/0 in the mode register set, and 1/0 in the extended mode register set.
Rev 1.5 / Aug. 2008
18