HY5S5B2CLFP-6E Datasheet, PDF (14/54 Pages) Hynix Semiconductor – 256M (8Mx32bit) Mobile SDRAM

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256Mbit (8Mx32bit) Mobile SDR Memory
HY5S5B2CLF(P) Series
AC CHARACTERISTICS II (AC operating conditions unless otherwise noted)
Parameter
RAS Cycle Time
RAS to CAS Delay
RAS Active Time
RAS Precharge Time
RAS to RAS Bank Active Delay
AUTO REFRESH Period
CAS to CAS Delay
Write Command to Data-In Delay
Data-in to Precharge Command
Data-In to Active Command
DQM to Data-Out Hi-Z
DQM to Data-In Mask
MRS to New Command
Precharge to Data Output ^{CAS Latency=3}
High-Z
CAS Latency=2
Power Down Exit Time
Self Refresh Exit Time
Refresh Time
166MHz 133MHz 105MHz
Symbol
Unit Note
Min Max Min Max Min Max
tRC
60 - 72.5 - 90 - ns
tRCD
18 - 22.5 - 28.5 - ns
tRAS
50 100K 50 100K 60 100K ns
tRP
18 - 22.5 - 28.5 - ns
tRRD
12 - 15 - 19 - ns
tRFC
80 - 80 - 80 - ns
tCCD
1
-
1
-
1
- CLK
tWTL
0
-
0
-
0
- CLK
tDPL
2
-
2
-
2
- CLK
tDAL
tDPL+tRP
tDQZ
2
-
2
-
2
- CLK
tDQM
0
-
0
-
0
- CLK
tMRD
2
-
2
-
2
- CLK
tPROZ3
3
-
3
-
3
- CLK
tPROZ2
2
-
2
-
2
- CLK
1CLK
1CLK
1CLK
tDPE
+ - + - + - CLK
tCKS
tCKS
tCKS
tXSR
120 - 120 - 120 - ns
tREF
- 64 - 64 - 64 ms
Rev 1.5 / Aug. 2008
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