HY5S6B6D Datasheet, PDF (11/27 Pages) Hynix Semiconductor – 4Banks x1M x 16bits Synchronous DRAM

HY5S6B6D(L/S)F(P)-xE
4Banks x 1M x 16bits Synchronous DRAM
DQM TRUTH TABLE
Function
Data Write/Output enable
Data Mask/Output disable
Lower byte write/Output enable,
Upper byte mask/Output disable
Lower byte Mask/Output disable,
Upper byte write/Output enable
CKEn-1
H
H
H
H
Note : 1. H: High Level, L: Low Level, X: Don't Care
2. Write DQM Latency is 0 CLK and Read DQM Latency is 2 CLK
CKEn
X
X
X
X
LDQM
L
H
L
H
UDQM
L
H
H
L
Rev 0.3 / July 2004
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