HY57V28820HCT-I Datasheet, PDF (10/11 Pages) Hynix Semiconductor – 4Banks x 4M x 8bits Synchronous DRAM

COMMAND TRUTH TABLE
HY57V28820HC(L)T-I
Command
CKEn-1 CKEn
CS
RAS CAS
WE
DQM ADDR
A10/
AP
BA Note
Mode Register Set
H
No Operation
H
Bank Active
H
Read
H
Read with Autoprecharge
Write
H
Write with Autoprecharge
Precharge All Banks
H
Precharge selected Bank
Burst Stop
H
DQM
H
Auto Refresh
H
Burst-Read-Single-
WRITE
H
Entry
H
Self Refresh
Exit
L
Entry
H
Precharge
power down
Exit
L
Clock
Suspend
Entry
H
Exit
L
X
L
L
L
L
X
OP code
1
H
X
X
X
X
X
X
L
H
H
H
X
L
L
H
H
X
RA
V
L
X
L
H
L
H
X
CA
V
H
L
X
L
H
L
L
X
CA
V
H
H
X
X
L
L
H
L
X
X
L
V
X
L
H
H
L
X
X
X
V
X
H
L
L
L
H
X
X
X
L
L
L
L
X
A9 Pin High
(Other Pins OP code)
MRS
Mode
L
L
L
L
H
X
H
X
X
X
X
H
X
L
H
H
H
H
X
X
X
L
X
L
H
H
H
X
H
X
X
X
H
X
L
H
H
H
H
X
X
X
L
X
L
V
V
V
X
H
X
X
Note :
1. OP Code : Operand Code
2. V = Valid, X = Dont care, H = Logic High, L= Logic Low, RA = Row Address, CA = Column Address.
3. The burst read sigle write mode is entered by programming the write burst mode bit (A9) in the mode register to a logic 1.
Rev. 0.1/Jan. 01
10