HY57V161610D Datasheet, PDF (10/13 Pages) Hynix Semiconductor – 2 Banks x 512K x 16 Bit Synchronous DRAM

AC CHARACTERISTICS (TA=0°C to 70°C, VDD=3.0V to 3.6V, VSS=0V^Note1,2)
Paramter
RAS cycle time
Operation
Auto Refresh
RAS to CAS delay
RAS active time
RAS precharge time
RAS to RAS bank active delay
CAS to CAS bank active delay
Write command to data-in delay
Data-in to precharge command
Data-in to active command
DQM to data-in Hi-Z
DQM to data mask
MRS to new command
Precharge to data output Hi-Z
Power down exit time
Self refresh exit time
Refresh Time
Symbol
tRC
tRRC
tRCD
tRAS
tRP
tRRD
tCCD
tWTL
tDPL
tDAL
tDQZ
tDQM
tMRD
tPROZ
tPDE
tSRE
tREF
-8
Min
Max
70
-
70
-
20
-
45
100K
3
-
2
-
1
-
0
-
1
-
4
-
2
-
0
-
2
-
3
-
1
-
1
-
-
64
-10
Min
Max
70
-
80
-
20
-
45
100K
2
-
2
-
1
-
0
-
1
-
3
-
2
-
0
-
2
-
3
-
1
-
1
-
-
64
Note :
1. VDD(min) is 3.15V when HY57V161610DTC-7 operates at CAS latency=2 and tCK2=8.9ns.
2.VDD(min) of HY57V161610DTC-5/55 is 3.15V
3. A new command can be given tRRC after self refresh exit.
HY57V161610D
-15
Min
Max
70
-
80
-
20
-
45
100K
2
-
2
-
1
-
0
-
1
-
3
-
2
-
0
-
2
-
3
-
1
-
1
-
-
64
- continued -
Unit
Note
ns
ns
ns
ns
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
3
ms
DEVICE OPERATING OPTION TABLE
HY57V161610DTC-5
200MHz
183MHz
166MHz
CAS Latency
3CLKs
3CLKs
3CLKs
tRCD
3CLKs
3CLKs
3CLKs
tRAS
8CLKs
7CLKs
7CLKs
tRC
11CLKs
10CLKs
10CLKs
tRP
3CLKs
3CLKs
3CLKs
tAC
4.5ns
5ns
5.5ns
tOH
1.5ns
2ns
2ns
Rev. 4.0/Aug. 02
10