HY57V161610D-I Datasheet, PDF (10/11 Pages) Hynix Semiconductor – 2 Banks x 512K x 16 Bit Synchronous DRAM

COMMAND TRUTH TABLE
HY57V161610D-I
Command
CKEn-1 CKEn
CS
RAS CAS
WE
DQM A0~A9
A10/
AP
BA
Note
Mode Register Set
H
X
L
L
L
L
X
OP code
No Operation
H
X
X
X
H
X
X
X
L
H
H
H
Bank Active
H
X
L
L
H
H
X
Row Address
V
Read
H
Read with Auto precharge
L
X
L
H
L
H
X
Column
Address
V
H
Write
H
Write with Auto precharge
L
X
L
H
L
L
X
Column
Address
V
H
Precharge All Bank
H
Precharge selected Bank
H
X
X
L
L
H
L
X
X
L
V
Burst Stop
H
X
L
H
H
L
X
X
U/LDQM
H
X
V
X
Auto Refresh
H
H
L
L
L
H
X
X
Burst-READ-Single-
WRITE
H
X
L
L
L
L
X
A9 Pin High
(Other Pins OP code)
Entry
H
L
L
L
L
H
X
Self Refresh¹
H
X
X
X
X
Exit
L
H
X
L
H
H
H
H
X
X
X
Entry
H
L
X
Precharge
power down
L
H
H
H
X
H
X
X
X
Exit
L
H
X
L
H
H
H
H
X
X
X
Entry
H
L
X
Clock Suspend
L
V
V
V
X
Exit
L
H
X
X
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high.
2. X=Do not care, L=Low, H=High, BA=Bank Address, RA= Row Address, CA=Column Address, Opcode=Operand Code,
NOP=No Operation.
Rev. 0.3/Mar. 02
10