HYMD216646D6-K Datasheet, PDF (1/30 Pages) Hynix Semiconductor – 1184pin Unbuffered DDR SDRAM DIMMs

184pin Unbuffered DDR SDRAM DIMMs based on 256Mb D ver. (TSOP)
This Hynix unbuffered Dual In-Line Memory Module (DIMM) series consists of 256Mb D ver. DDR SDRAMs in 400 mil
TSOP II packages on a 184pin glass-epoxy substrate. This Hynix 256Mb D ver. based unbuffered DIMM series provide
a high performance 8 byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange
and addition.
FEATURES
• JEDEC Standard 184-pin dual in-line memory module
(DIMM)
• Two ranks 64M x 72, 64M x 64 and One rank 32M x
72, 32M x 64, 16M x 64 organization
• 2.6V ± 0.1V VDD and VDDQ Power supply for
DDR400, 2.5V ± 0.2V for DDR333 and below
• All inputs and outputs are compatible with SSTL_2
interface
• Fully differential clock operations (CK & /CK) with
133/166/200MHz
• DLL aligns DQ and DQS transition with CK transition
• Programmable CAS Latency: DDR266(2, 2.5 clock),
DDR333(2.5 clock), DDR400(3 clock)
• Programmable Burst Length 2 / 4 / 8 with both
sequential and interleave mode
• Edge-aligned DQS with data outs and Center-aligned
DQS with data inputs
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
• Serial Presence Detect (SPD) with EEPROM
• Built with 256Mb DDR SDRAMs in 400 mil TSOP II
packages
• Lead-free product listed for each configuration
(RoHS compliant)
ADDRESS TABLE
Organization Ranks
128MB 16M x 64
1
256MB 32M x 64
1
256MB 32M x 72
1
512MB 64M x 64
2
512MB 64M x 72
2
SDRAMs
16Mb x 16
32Mb x 8
32Mb x 8
32Mb x 8
32Mb x 8
# of
DRAMs
4
8
9
16
18
# of row/bank/column Address
12(A0~A11)/2(BA0,BA1)/9(A0~A8)
13(A0~A12)/2(BA0,BA1)/10(A0~A9)
13(A0~A12)/2(BA0,BA1)/10(A0~A9)
13(A0~A12)/2(BA0,BA1)/10(A0~A9)
13(A0~A12)/2(BA0,BA1)/10(A0~A9)
Refresh
Method
8K / 64ms
8K / 64ms
8K / 64ms
8K / 64ms
8K / 64ms
PERFORMANCE RANGE
Part Number Suffix
-D43¹
-J
-K
-H
Unit
Speed Bin
DDR400B
DDR333
DDR266A
DDR266B
-
CL - tRCD- tRP
3-3-3
2.5-3-3
2-3-3
2.5-3-3
CK
CL=3
200
-
-
-
MHz
Max Clock
Frequency
CL=2.5
166
166
133
133
MHz
CL=2
133
133
133
133
MHz
Note:
1. 2.6V ± 0.1V VDD and VDDQ Power supply for DDR400 and 2.5V ± 0.2V for DDR333 and below
Rev. 1.2 / May. 2005
1
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.