HDMP-0422 Datasheet, PDF (4/14 Pages) Agilent(Hewlett-Packard) – Single Port Bypass Circuit with CDR & Data Valid Detection Capability for Fibre Channel Arbitrated Loops

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Figure 3. Connection diagram for CDR at last cell.
Figure 2. Connection diagram for CDR at first cell.
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
CPLL
CPLL
AV
DV
AV
DV
CDR
1
CDR
1
0
0
0
0
0
0
1
1
1
1
EQU
BLL
TTL
BLL
EQU
BLL
TTL
BLL
EQU
EQU
HARD DISK A
SERDES
HARD DISK A
SERDES